| commit | 685572dd2b51252bacb901b2fc0fb0c1f8e0b3ad | [log] [tgz] |
|---|---|---|
| author | Cindy Chen <chencindy@opentitan.org> | Wed Jul 21 09:46:18 2021 -0700 |
| committer | cindychip <cindy.chen0316@gmail.com> | Sun Jul 25 08:46:49 2021 -0700 |
| tree | d69795144be5a6239795ca3a289ff1017a8cd6d6 | |
| parent | 3c5cde5d0dd75f470e6894a4d0d9212d3808bebb [diff] |
[dv/otp_ctrl] Fix wake_up test This PR fixes wake up test when clearing the interrupts at the end of the sequence - it should write `1` to the OperationDone bit instead of `0`. This PR also adds a final intr_state read to ensure all interrupts are cleared. Thanks Dror for finding this issue. Signed-off-by: Cindy Chen <chencindy@opentitan.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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