commit 66e40939f6e891174c28b25501b58ad39fe9c421
author Rupert Swarbrick <rswarbrick@lowrisc.org> Tue Feb 16 13:11:27 2021 +0000
committer Rupert Swarbrick <rswarbrick@gmail.com> Tue Feb 16 17:43:03 2021 +0000
tree 498545cc2f561b264afbfe6d03ccb95de9588ee4
parent a5973fbc32af0b21cb2a00e3acc293642b4ae097

[regtool] Also expose reset values per-field for hwext registers

This is a follow-up to commit c5841b7, which exposed the register
values. Here, we expose field values too. The result looks like:

    parameter logic [11:0] AES_CTRL_SHADOWED_RESVAL = 12'h c0;
    parameter logic [5:0] AES_CTRL_SHADOWED_MODE_RESVAL = 6'h 20;
    parameter logic [2:0] AES_CTRL_SHADOWED_KEY_LEN_RESVAL = 3'h 1;
    parameter logic [0:0] AES_CTRL_SHADOWED_FORCE_ZERO_MASKS_RESVAL = 1'h 0;

Here, AES_CTRL_SHADOWED is a hwext register, which has fields MODE,
KEY_LEN and FORCE_ZERO.

Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>

util/reggen/reg_pkg.sv.tpl

diff --git a/util/reggen/reg_pkg.sv.tpl b/util/reggen/reg_pkg.sv.tpl
index 02a1459..58ef7b5 100644
--- a/util/reggen/reg_pkg.sv.tpl
+++ b/util/reggen/reg_pkg.sv.tpl
@@ -227,6 +227,12 @@
 def reg_pfx(reg):
   return '{}_{}'.format(ublock, reg.name.upper())
 
+def reg_resname(reg):
+  return '{}_RESVAL'.format(reg_pfx(reg))
+
+def field_resname(reg, field):
+  return '{}_{}_RESVAL'.format(reg_pfx(reg), field.name.upper())
+
 %>\
 % for r in flat_regs:
   parameter logic [BlockAw-1:0] ${reg_pfx(r)}_OFFSET = ${block.addr_width}'h ${"%x" % r.offset};
@@ -236,13 +242,22 @@
   hwext_regs = [r for r in flat_regs if r.hwext]
 %>\
 % if hwext_regs:
-  // Reset values for hwext registers
+  // Reset values for hwext registers and their fields
   % for reg in hwext_regs:
 <%
     reg_width = reg.get_width()
     reg_msb = reg_width - 1
 %>\
-  parameter logic [${reg_msb}:0] ${reg_pfx(reg)}_RESVAL = ${"{}'h {:x}".format(reg_width, reg.resval)};
+  parameter logic [${reg_msb}:0] ${reg_resname(reg)} = ${"{}'h {:x}".format(reg_width, reg.resval)};
+    % for field in reg.fields:
+      % if field.resval is not None:
+<%
+    field_width = field.bits.width()
+    field_msb = field_width - 1
+%>\
+  parameter logic [${field_msb}:0] ${field_resname(reg, field)} = ${"{}'h {:x}".format(field_width, field.resval)};
+      % endif
+    % endfor
   % endfor
 
 % endif