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opensecura / 3p / lowrisc / opentitan / 669cb4ad9febb12ce307cf73fb7431ec5bb3acc5 / . / hw / ip / prim / lint
tree: 42d193ef28d1d85ee96afea0d379494e751ef319 [path history] [tgz]
  1. prim.vlt
  2. prim.waiver
  3. prim_and2.waiver
  4. prim_arbiter.vlt
  5. prim_arbiter.waiver
  6. prim_assert.vlt
  7. prim_assert.waiver
  8. prim_buf.waiver
  9. prim_cipher_pkg.waiver
  10. prim_clock_buf.waiver
  11. prim_clock_div.waiver
  12. prim_clock_gating.waiver
  13. prim_clock_inv.waiver
  14. prim_clock_mux2.waiver
  15. prim_count.vlt
  16. prim_count.waiver
  17. prim_crc32.vlt
  18. prim_double_lfsr.waiver
  19. prim_fifo.vlt
  20. prim_fifo.waiver
  21. prim_flash.waiver
  22. prim_flop.waiver
  23. prim_flop_2sync.waiver
  24. prim_flop_en.waiver
  25. prim_lfsr.waiver
  26. prim_max_tree.vlt
  27. prim_max_tree.waiver
  28. prim_mubi.waiver
  29. prim_otp.waiver
  30. prim_pad_attr.waiver
  31. prim_pad_wrapper.waiver
  32. prim_ram_1p.waiver
  33. prim_ram_1p_adv.waiver
  34. prim_ram_1p_scr.vlt
  35. prim_ram_2p.waiver
  36. prim_rom.waiver
  37. prim_sparse_fsm_flop.vlt
  38. prim_sparse_fsm_flop.waiver
  39. prim_subreg.vlt
  40. prim_subreg.waiver
  41. prim_sum_tree.vlt
  42. prim_sum_tree.waiver
  43. prim_usb_diff_rx.waiver
  44. prim_xor2.waiver
  45. prim_xoshiro256pp.vlt