commit 649604ee6a6c41979e38a7c8ae6ce021594ca2dd
author Weicai Yang <weicai@google.com> Thu Sep 23 22:21:52 2021 -0700
committer weicaiyang <49293026+weicaiyang@users.noreply.github.com> Fri Sep 24 11:24:19 2021 -0700
tree b8cd81fec5fbf06d1e1ea65e5c1b9307fa803280
parent dcbb54da015402db10bff092bd4291ece1fddc6d

[keymgr/dv] Update scb for sw_binding_regwen

Small update for design change in #8323
Signed-off-by: Weicai Yang <weicai@google.com>

hw/ip/keymgr/dv/env/keymgr_scoreboard.sv

diff --git a/hw/ip/keymgr/dv/env/keymgr_scoreboard.sv b/hw/ip/keymgr/dv/env/keymgr_scoreboard.sv
index 34e102e..61a4f10 100644
--- a/hw/ip/keymgr/dv/env/keymgr_scoreboard.sv
+++ b/hw/ip/keymgr/dv/env/keymgr_scoreboard.sv
@@ -431,11 +431,6 @@
         `uvm_info(`gfn, $sformatf("Reg write to %0s is ignored due to sw_binding_regwen=0",
                                   csr.get_name()), UVM_MEDIUM)
         return;
-      end else if (csr.get_name() == "sw_binding_regwen" && current_state == keymgr_pkg::StReset)
-      begin
-        `uvm_info(`gfn, $sformatf("Reg write to %0s is ignored due to state in StReset",
-                                  csr.get_name()), UVM_MEDIUM)
-        return;
       end else begin
         void'(csr.predict(.value(item.a_data), .kind(UVM_PREDICT_WRITE), .be(item.a_mask)));
       end