| commit | 633cd3372948a07e20a784cdb33321e75ec58b9f | [log] [tgz] |
|---|---|---|
| author | Martin Lueker-Boden <martin.lueker-boden@wdc.com> | Sun Jul 18 10:08:11 2021 -0700 |
| committer | Martin Lueker-Boden <47870387+martin-lueker@users.noreply.github.com> | Tue Aug 17 16:11:50 2021 -0700 |
| tree | 14f4026b0000bbd828dc0426580d43d78d16dd94 | |
| parent | eff18489b77dbec525958adb9fa4f632a6d491d9 [diff] |
[spi_host,design] Properly handle TX "stall" and "flush" conditions This commit handles three bugs in the SPI_HOST FSM. 1. This commit adds a separate "prestall" copy of the FSM state to prevent commands being dropped when no data is avaiable in the TX queue. Since a stall prevents the FSM from updating command_valid signals were previously being ignored during stall conditions, as the state machine would not transition at this time. This is solved by queuing an update of the FSM in the "prestall" state variable, and performing the state transition once the stall has been resolved. NOTE: the simpler solution of deasserting command_ready during stalls does not work, because the stall condition depends on the state, which in turn depends on command_ready. Making the FSM state directly dependent on stall creates an unresolvable logical cycle. 2. Previous to this commit, the FSM cmd_end signal was being sent at the very beginning of each segment (when byte_cntr_q was zero). This was causing the byte select to imcorrectly flush any additional words from the first data word. This is fixed here by triggering cmd_end_o when byte_cntr_q == 1, just as we are loading the segment's last byte into the shift register. 3. Other FSM Bugfixes: The polarity of the CSAAT (chip select active after transaction) bit was previously misinterpreted. This is now corrected with this commit Signed-off-by: Martin Lueker-Boden <martin.lueker-boden@wdc.com>
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