Add formatting changes from allow list
Signed-off-by: Rafal Kapuscik <rkapuscik@antmicro.com>
diff --git a/hw/dv/sv/alert_esc_agent/alert_esc_base_monitor.sv b/hw/dv/sv/alert_esc_agent/alert_esc_base_monitor.sv
index 29f0934..c8f8c3e 100644
--- a/hw/dv/sv/alert_esc_agent/alert_esc_base_monitor.sv
+++ b/hw/dv/sv/alert_esc_agent/alert_esc_base_monitor.sv
@@ -7,11 +7,11 @@
// Alert sender receiver interface base monitor
// ---------------------------------------------
-class alert_esc_base_monitor extends dv_base_monitor#(
- .ITEM_T (alert_esc_seq_item),
- .CFG_T (alert_esc_agent_cfg),
- .COV_T (alert_esc_agent_cov)
- );
+class alert_esc_base_monitor extends dv_base_monitor #(
+ .ITEM_T(alert_esc_seq_item),
+ .CFG_T (alert_esc_agent_cfg),
+ .COV_T (alert_esc_agent_cov)
+);
`uvm_component_utils(alert_esc_base_monitor)
uvm_analysis_port #(alert_esc_seq_item) alert_esc_port;
diff --git a/hw/dv/sv/alert_esc_agent/alert_esc_probe_if.sv b/hw/dv/sv/alert_esc_agent/alert_esc_probe_if.sv
index 2bfa9d6..6bf01af 100644
--- a/hw/dv/sv/alert_esc_agent/alert_esc_probe_if.sv
+++ b/hw/dv/sv/alert_esc_agent/alert_esc_probe_if.sv
@@ -8,7 +8,10 @@
// state the expected resp_p should be high or not. However, from the esc_receiver interface, we
// can only see "esc_p/n", which follows "esc_en_i" with one clock cycle delay.
// Thus we need to probe this signal to accurately predict the signal integrity fail count.
-interface alert_esc_probe_if(input clk, input rst_n);
+interface alert_esc_probe_if (
+ input clk,
+ input rst_n
+);
wire esc_en;
diff --git a/hw/dv/sv/dv_utils/dv_test_status_pkg.sv b/hw/dv/sv/dv_utils/dv_test_status_pkg.sv
index b6dd537..3a81ddf 100644
--- a/hw/dv/sv/dv_utils/dv_test_status_pkg.sv
+++ b/hw/dv/sv/dv_utils/dv_test_status_pkg.sv
@@ -18,8 +18,7 @@
$display(" | | __/\\__ \\ |_ | |_) | (_| \\__ \\__ \\ __/ (_| |_|");
$display(" |_|\\___||___/\\__| | .__/ \\__,_|___/___/\\___|\\__,_(_)");
$display(" |_| \n");
- end
- else begin
+ end else begin
$display("\nTEST FAILED CHECKS");
$display(" _____ _ __ _ _ _ _ ");
$display("|_ _|__ ___| |_ / _| __ _(_) | ___ __| | |");
diff --git a/hw/ip/adc_ctrl/dv/env/adc_ctrl_env_cfg.sv b/hw/ip/adc_ctrl/dv/env/adc_ctrl_env_cfg.sv
index b4e361b..14bd455 100644
--- a/hw/ip/adc_ctrl/dv/env/adc_ctrl_env_cfg.sv
+++ b/hw/ip/adc_ctrl/dv/env/adc_ctrl_env_cfg.sv
@@ -2,7 +2,9 @@
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
-class adc_ctrl_env_cfg extends cip_base_env_cfg #(.RAL_T(adc_ctrl_reg_block));
+class adc_ctrl_env_cfg extends cip_base_env_cfg #(
+ .RAL_T(adc_ctrl_reg_block)
+);
virtual clk_rst_if clk_aon_rst_vif;
diff --git a/hw/ip/adc_ctrl/dv/env/adc_ctrl_env_cov.sv b/hw/ip/adc_ctrl/dv/env/adc_ctrl_env_cov.sv
index 1220afe..b26628f 100644
--- a/hw/ip/adc_ctrl/dv/env/adc_ctrl_env_cov.sv
+++ b/hw/ip/adc_ctrl/dv/env/adc_ctrl_env_cov.sv
@@ -8,7 +8,9 @@
* Covergroups may also be wrapped inside helper classes if needed.
*/
-class adc_ctrl_env_cov extends cip_base_env_cov #(.CFG_T(adc_ctrl_env_cfg));
+class adc_ctrl_env_cov extends cip_base_env_cov #(
+ .CFG_T(adc_ctrl_env_cfg)
+);
`uvm_component_utils(adc_ctrl_env_cov)
// the base class provides the following handles for use:
diff --git a/hw/ip/adc_ctrl/dv/env/adc_ctrl_virtual_sequencer.sv b/hw/ip/adc_ctrl/dv/env/adc_ctrl_virtual_sequencer.sv
index b9547f6..2e230bc 100644
--- a/hw/ip/adc_ctrl/dv/env/adc_ctrl_virtual_sequencer.sv
+++ b/hw/ip/adc_ctrl/dv/env/adc_ctrl_virtual_sequencer.sv
@@ -3,9 +3,9 @@
// SPDX-License-Identifier: Apache-2.0
class adc_ctrl_virtual_sequencer extends cip_base_virtual_sequencer #(
- .CFG_T(adc_ctrl_env_cfg),
- .COV_T(adc_ctrl_env_cov)
- );
+ .CFG_T(adc_ctrl_env_cfg),
+ .COV_T(adc_ctrl_env_cov)
+);
`uvm_component_utils(adc_ctrl_virtual_sequencer)
diff --git a/hw/ip/adc_ctrl/dv/env/seq_lib/adc_ctrl_base_vseq.sv b/hw/ip/adc_ctrl/dv/env/seq_lib/adc_ctrl_base_vseq.sv
index b2de411..9248f06 100644
--- a/hw/ip/adc_ctrl/dv/env/seq_lib/adc_ctrl_base_vseq.sv
+++ b/hw/ip/adc_ctrl/dv/env/seq_lib/adc_ctrl_base_vseq.sv
@@ -3,11 +3,11 @@
// SPDX-License-Identifier: Apache-2.0
class adc_ctrl_base_vseq extends cip_base_vseq #(
- .RAL_T (adc_ctrl_reg_block),
- .CFG_T (adc_ctrl_env_cfg),
- .COV_T (adc_ctrl_env_cov),
- .VIRTUAL_SEQUENCER_T (adc_ctrl_virtual_sequencer)
- );
+ .RAL_T (adc_ctrl_reg_block),
+ .CFG_T (adc_ctrl_env_cfg),
+ .COV_T (adc_ctrl_env_cov),
+ .VIRTUAL_SEQUENCER_T(adc_ctrl_virtual_sequencer)
+);
`uvm_object_utils(adc_ctrl_base_vseq)
// various knobs to enable certain routines
@@ -28,13 +28,13 @@
// setup basic adc_ctrl features
virtual task adc_ctrl_init();
`uvm_info(`gfn, "Initializating adc_ctrl, nothing to do at the moment", UVM_MEDIUM)
- endtask // adc_ctrl_init
+ endtask // adc_ctrl_init
virtual task apply_reset(string kind = "HARD");
if (kind == "HARD") begin
cfg.clk_aon_rst_vif.apply_reset();
end
super.apply_reset(kind);
- endtask // apply_reset
+ endtask // apply_reset
endclass : adc_ctrl_base_vseq
diff --git a/hw/ip/adc_ctrl/dv/tb.sv b/hw/ip/adc_ctrl/dv/tb.sv
index 50ecbb7..c2c4235 100644
--- a/hw/ip/adc_ctrl/dv/tb.sv
+++ b/hw/ip/adc_ctrl/dv/tb.sv
@@ -18,25 +18,34 @@
wire [NUM_MAX_INTERRUPTS-1:0] interrupts;
// interfaces
- clk_rst_if clk_rst_if(.clk(clk), .rst_n(rst_n));
- clk_rst_if clk_aon_rst_if(.clk(clk_aon), .rst_n(rst_aon_n));
- pins_if #(NUM_MAX_INTERRUPTS) intr_if(interrupts);
- pins_if #(1) devmode_if(devmode);
- tl_if tl_if(.clk(clk), .rst_n(rst_n));
+ clk_rst_if clk_rst_if (
+ .clk (clk),
+ .rst_n(rst_n)
+ );
+ clk_rst_if clk_aon_rst_if (
+ .clk (clk_aon),
+ .rst_n(rst_aon_n)
+ );
+ pins_if #(NUM_MAX_INTERRUPTS) intr_if (interrupts);
+ pins_if #(1) devmode_if (devmode);
+ tl_if tl_if (
+ .clk (clk),
+ .rst_n(rst_n)
+ );
// dut
adc_ctrl dut (
- .clk_i (clk ),
- .rst_ni (rst_n ),
- .clk_aon_i (clk_aon ),
- .rst_slow_ni (rst_aon_n),
- .tl_i (tl_if.h2d),
- .tl_o (tl_if.d2h),
- .adc_o (),
- .adc_i ('0),
- .intr_debug_cable_o (interrupts[0]),
- .debug_cable_wakeup_o ()
+ .clk_i (clk),
+ .rst_ni (rst_n),
+ .clk_aon_i (clk_aon),
+ .rst_slow_ni (rst_aon_n),
+ .tl_i (tl_if.h2d),
+ .tl_o (tl_if.d2h),
+ .adc_o (),
+ .adc_i ('0),
+ .intr_debug_cable_o (interrupts[0]),
+ .debug_cable_wakeup_o()
);
initial begin
diff --git a/hw/ip/adc_ctrl/dv/tests/adc_ctrl_base_test.sv b/hw/ip/adc_ctrl/dv/tests/adc_ctrl_base_test.sv
index dad1947..3609d82 100644
--- a/hw/ip/adc_ctrl/dv/tests/adc_ctrl_base_test.sv
+++ b/hw/ip/adc_ctrl/dv/tests/adc_ctrl_base_test.sv
@@ -3,9 +3,9 @@
// SPDX-License-Identifier: Apache-2.0
class adc_ctrl_base_test extends cip_base_test #(
- .CFG_T(adc_ctrl_env_cfg),
- .ENV_T(adc_ctrl_env)
- );
+ .CFG_T(adc_ctrl_env_cfg),
+ .ENV_T(adc_ctrl_env)
+);
`uvm_component_utils(adc_ctrl_base_test)
`uvm_component_new
diff --git a/hw/ip/adc_ctrl/rtl/adc_ctrl.sv b/hw/ip/adc_ctrl/rtl/adc_ctrl.sv
index a240fa4..2124558 100644
--- a/hw/ip/adc_ctrl/rtl/adc_ctrl.sv
+++ b/hw/ip/adc_ctrl/rtl/adc_ctrl.sv
@@ -7,10 +7,10 @@
`include "prim_assert.sv"
module adc_ctrl (
- input clk_i,//regular core clock for SW config interface
- input clk_aon_i,//always-on slow clock for internal logic
- input rst_ni,//power-on hardware reset
- input rst_slow_ni,//power-on reset for the 200KHz clock(logic)
+ input clk_i, //regular core clock for SW config interface
+ input clk_aon_i, //always-on slow clock for internal logic
+ input rst_ni, //power-on hardware reset
+ input rst_slow_ni, //power-on reset for the 200KHz clock(logic)
//Regster interface
input tlul_pkg::tl_h2d_t tl_i,
@@ -39,7 +39,7 @@
//input [2:0] pwr_sts,//3’b001: deep sleep, 3’b010: normal sleep, 3’b100: fully active
);
- import adc_ctrl_reg_pkg::* ;
+ import adc_ctrl_reg_pkg::*;
adc_ctrl_reg2hw_t reg2hw;
adc_ctrl_hw2reg_t hw2reg;
@@ -55,7 +55,7 @@
.reg2hw(reg2hw),
.hw2reg(hw2reg),
.intg_err_o(),
- .devmode_i (1'b1)
+ .devmode_i(1'b1)
);
// Instantiate DCD core module
diff --git a/hw/ip/gpio/dv/env/gpio_env.sv b/hw/ip/gpio/dv/env/gpio_env.sv
index ae942de..b1d154c 100644
--- a/hw/ip/gpio/dv/env/gpio_env.sv
+++ b/hw/ip/gpio/dv/env/gpio_env.sv
@@ -3,11 +3,11 @@
// SPDX-License-Identifier: Apache-2.0
class gpio_env extends cip_base_env #(
- .CFG_T (gpio_env_cfg),
- .COV_T (gpio_env_cov),
- .VIRTUAL_SEQUENCER_T (gpio_virtual_sequencer),
- .SCOREBOARD_T (gpio_scoreboard)
- );
+ .CFG_T (gpio_env_cfg),
+ .COV_T (gpio_env_cov),
+ .VIRTUAL_SEQUENCER_T(gpio_virtual_sequencer),
+ .SCOREBOARD_T (gpio_scoreboard)
+);
`uvm_component_utils(gpio_env)
`uvm_component_new
diff --git a/hw/ip/gpio/dv/env/gpio_env_cfg.sv b/hw/ip/gpio/dv/env/gpio_env_cfg.sv
index 742c6a4..a09acd4 100644
--- a/hw/ip/gpio/dv/env/gpio_env_cfg.sv
+++ b/hw/ip/gpio/dv/env/gpio_env_cfg.sv
@@ -2,7 +2,9 @@
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
-class gpio_env_cfg extends cip_base_env_cfg #(.RAL_T(gpio_reg_block));
+class gpio_env_cfg extends cip_base_env_cfg #(
+ .RAL_T(gpio_reg_block)
+);
// flag to indicate if weak pullup has been introduced on gpio
// By default, weak pull up is always present
@@ -12,9 +14,7 @@
// gpio virtual interface
gpio_vif gpio_vif;
- constraint pullup_pulldown_en_c {
- pullup_en ^ pulldown_en;
- }
+ constraint pullup_pulldown_en_c {pullup_en ^ pulldown_en;}
`uvm_object_utils(gpio_env_cfg)
`uvm_object_new
diff --git a/hw/ip/gpio/dv/env/seq_lib/gpio_intr_rand_pgm_vseq.sv b/hw/ip/gpio/dv/env/seq_lib/gpio_intr_rand_pgm_vseq.sv
index a9e5bf3..57e242d 100644
--- a/hw/ip/gpio/dv/env/seq_lib/gpio_intr_rand_pgm_vseq.sv
+++ b/hw/ip/gpio/dv/env/seq_lib/gpio_intr_rand_pgm_vseq.sv
@@ -85,7 +85,7 @@
end
`uvm_info(msg_id, "End of Transaction", UVM_HIGH)
- end // end for
+ end // end for
endtask : body
diff --git a/hw/ip/gpio/dv/tb/tb.sv b/hw/ip/gpio/dv/tb/tb.sv
index 90e6af9..9e7283f 100644
--- a/hw/ip/gpio/dv/tb/tb.sv
+++ b/hw/ip/gpio/dv/tb/tb.sv
@@ -25,25 +25,31 @@
wire [NUM_MAX_INTERRUPTS-1:0] interrupts;
// interfaces
- clk_rst_if clk_rst_if(.clk(clk), .rst_n(rst_n));
- pins_if #(NUM_MAX_INTERRUPTS) intr_if(.pins(interrupts));
- pins_if #(1) devmode_if(.pins(devmode));
- tl_if tl_if(.clk(clk), .rst_n(rst_n));
- pins_if #(NUM_GPIOS) gpio_if(.pins(gpio_pins));
+ clk_rst_if clk_rst_if (
+ .clk (clk),
+ .rst_n(rst_n)
+ );
+ pins_if #(NUM_MAX_INTERRUPTS) intr_if (.pins(interrupts));
+ pins_if #(1) devmode_if (.pins(devmode));
+ tl_if tl_if (
+ .clk (clk),
+ .rst_n(rst_n)
+ );
+ pins_if #(NUM_GPIOS) gpio_if (.pins(gpio_pins));
// dut
gpio dut (
- .clk_i (clk ),
- .rst_ni (rst_n ),
+ .clk_i (clk),
+ .rst_ni(rst_n),
- .tl_i (tl_if.h2d ),
- .tl_o (tl_if.d2h ),
+ .tl_i(tl_if.h2d),
+ .tl_o(tl_if.d2h),
- .cio_gpio_i (gpio_i ),
- .cio_gpio_o (gpio_o ),
- .cio_gpio_en_o (gpio_oe ),
+ .cio_gpio_i (gpio_i),
+ .cio_gpio_o (gpio_o),
+ .cio_gpio_en_o(gpio_oe),
- .intr_gpio_o (gpio_intr )
+ .intr_gpio_o(gpio_intr)
);
assign interrupts[NUM_GPIOS-1:0] = gpio_intr;
diff --git a/hw/ip/gpio/dv/tests/gpio_base_test.sv b/hw/ip/gpio/dv/tests/gpio_base_test.sv
index 8ce07d2..f695458 100644
--- a/hw/ip/gpio/dv/tests/gpio_base_test.sv
+++ b/hw/ip/gpio/dv/tests/gpio_base_test.sv
@@ -2,7 +2,10 @@
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
-class gpio_base_test extends cip_base_test #(.ENV_T(gpio_env), .CFG_T(gpio_env_cfg));
+class gpio_base_test extends cip_base_test #(
+ .ENV_T(gpio_env),
+ .CFG_T(gpio_env_cfg)
+);
`uvm_component_utils(gpio_base_test)
`uvm_component_new
diff --git a/hw/ip/pinmux/rtl/pinmux_jtag_buf.sv b/hw/ip/pinmux/rtl/pinmux_jtag_buf.sv
index d3b6dfa..fd8db19 100644
--- a/hw/ip/pinmux/rtl/pinmux_jtag_buf.sv
+++ b/hw/ip/pinmux/rtl/pinmux_jtag_buf.sv
@@ -14,23 +14,23 @@
.clk_o(req_o.tck)
);
prim_buf prim_buf_trst_n (
- .in_i(req_i.trst_n),
+ .in_i (req_i.trst_n),
.out_o(req_o.trst_n)
);
prim_buf prim_buf_tms (
- .in_i(req_i.tms),
+ .in_i (req_i.tms),
.out_o(req_o.tms)
);
prim_buf prim_buf_tdi (
- .in_i(req_i.tdi),
+ .in_i (req_i.tdi),
.out_o(req_o.tdi)
);
prim_buf prim_buf_tdo (
- .in_i(rsp_i.tdo),
+ .in_i (rsp_i.tdo),
.out_o(rsp_o.tdo)
);
prim_buf prim_buf_tdo_oe (
- .in_i(rsp_i.tdo_oe),
+ .in_i (rsp_i.tdo_oe),
.out_o(rsp_o.tdo_oe)
);
diff --git a/hw/ip/prim_xilinx/rtl/prim_xilinx_buf.sv b/hw/ip/prim_xilinx/rtl/prim_xilinx_buf.sv
index e0ab77d..aa89d8a 100644
--- a/hw/ip/prim_xilinx/rtl/prim_xilinx_buf.sv
+++ b/hw/ip/prim_xilinx/rtl/prim_xilinx_buf.sv
@@ -2,7 +2,7 @@
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
-module prim_xilinx_buf #(
+module prim_xilinx_buf #(
parameter int Width = 1
) (
input [Width-1:0] in_i,
diff --git a/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_buf.sv b/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_buf.sv
index 5de8f58..05777ca 100644
--- a/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_buf.sv
+++ b/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_buf.sv
@@ -8,8 +8,8 @@
);
BUFG bufg_i (
- .I (clk_i),
- .O (clk_o)
+ .I(clk_i),
+ .O(clk_o)
);
endmodule
diff --git a/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_gating.sv b/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_gating.sv
index c30e95c..daf2e1d 100644
--- a/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_gating.sv
+++ b/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_gating.sv
@@ -15,9 +15,9 @@
assign clk_o = clk_i;
end else begin : gen_gate
BUFGCE u_bufgce (
- .I (clk_i),
- .CE (en_i | test_en_i),
- .O (clk_o)
+ .I (clk_i),
+ .CE(en_i | test_en_i),
+ .O (clk_o)
);
end
diff --git a/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_mux2.sv b/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_mux2.sv
index fd25147..3e43f57 100644
--- a/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_mux2.sv
+++ b/hw/ip/prim_xilinx/rtl/prim_xilinx_clock_mux2.sv
@@ -20,11 +20,11 @@
// ug953-vivado-7series-libraries.pdf
// ug974-vivado-ultrascale-libraries.pdf
BUFGMUX bufgmux_i (
- .S ( sel_i ),
- .I0 ( clk0_i ),
- .I1 ( clk1_i ),
- .O ( clk_o )
- );
+ .S (sel_i),
+ .I0(clk0_i),
+ .I1(clk1_i),
+ .O (clk_o)
+ );
end
// make sure sel is never X (including during reset)
diff --git a/hw/ip/pwm/dv/env/pwm_env_cov.sv b/hw/ip/pwm/dv/env/pwm_env_cov.sv
index 94d0c6b..c681fd7 100644
--- a/hw/ip/pwm/dv/env/pwm_env_cov.sv
+++ b/hw/ip/pwm/dv/env/pwm_env_cov.sv
@@ -8,7 +8,9 @@
* Covergroups may also be wrapped inside helper classes if needed.
*/
-class pwm_env_cov extends cip_base_env_cov #(.CFG_T(pwm_env_cfg));
+class pwm_env_cov extends cip_base_env_cov #(
+ .CFG_T(pwm_env_cfg)
+);
`uvm_component_utils(pwm_env_cov)
// the base class provides the following handles for use:
diff --git a/hw/ip/pwm/dv/env/pwm_virtual_sequencer.sv b/hw/ip/pwm/dv/env/pwm_virtual_sequencer.sv
index 2b1e107..87ac829 100644
--- a/hw/ip/pwm/dv/env/pwm_virtual_sequencer.sv
+++ b/hw/ip/pwm/dv/env/pwm_virtual_sequencer.sv
@@ -3,9 +3,9 @@
// SPDX-License-Identifier: Apache-2.0
class pwm_virtual_sequencer extends cip_base_virtual_sequencer #(
- .CFG_T(pwm_env_cfg),
- .COV_T(pwm_env_cov)
- );
+ .CFG_T(pwm_env_cfg),
+ .COV_T(pwm_env_cov)
+);
`uvm_component_utils(pwm_virtual_sequencer)
diff --git a/hw/ip/pwm/dv/env/seq_lib/pwm_base_vseq.sv b/hw/ip/pwm/dv/env/seq_lib/pwm_base_vseq.sv
index 833a2af..a8249bb 100644
--- a/hw/ip/pwm/dv/env/seq_lib/pwm_base_vseq.sv
+++ b/hw/ip/pwm/dv/env/seq_lib/pwm_base_vseq.sv
@@ -3,11 +3,11 @@
// SPDX-License-Identifier: Apache-2.0
class pwm_base_vseq extends cip_base_vseq #(
- .RAL_T (pwm_reg_block),
- .CFG_T (pwm_env_cfg),
- .COV_T (pwm_env_cov),
- .VIRTUAL_SEQUENCER_T (pwm_virtual_sequencer)
- );
+ .RAL_T (pwm_reg_block),
+ .CFG_T (pwm_env_cfg),
+ .COV_T (pwm_env_cov),
+ .VIRTUAL_SEQUENCER_T(pwm_virtual_sequencer)
+);
`uvm_object_utils(pwm_base_vseq)
`uvm_object_new
@@ -24,8 +24,8 @@
virtual task pre_start();
cfg.m_pwm_agent_cfg.en_monitor = cfg.en_scb;
- `uvm_info(`gfn, $sformatf("\n--> %s monitor and scoreboard",
- cfg.en_scb ? "enable" : "disable"), UVM_DEBUG)
+ `uvm_info(`gfn, $sformatf("\n--> %s monitor and scoreboard", cfg.en_scb ? "enable" : "disable"),
+ UVM_DEBUG)
num_runs.rand_mode(0);
// unset to disable intr test because pwm does not have intr pins
do_clear_all_interrupts = 1'b0;
@@ -63,6 +63,6 @@
cfg.clk_rst_core_vif.wait_clks($urandom_range(5, 10));
join
end
- endtask : do_phase_align_reset
+ endtask : do_phase_align_reset
endclass : pwm_base_vseq
diff --git a/hw/ip/pwm/dv/tests/pwm_base_test.sv b/hw/ip/pwm/dv/tests/pwm_base_test.sv
index 9cb09fb..54602b5 100644
--- a/hw/ip/pwm/dv/tests/pwm_base_test.sv
+++ b/hw/ip/pwm/dv/tests/pwm_base_test.sv
@@ -3,9 +3,9 @@
// SPDX-License-Identifier: Apache-2.0
class pwm_base_test extends cip_base_test #(
- .CFG_T(pwm_env_cfg),
- .ENV_T(pwm_env)
- );
+ .CFG_T(pwm_env_cfg),
+ .ENV_T(pwm_env)
+);
`uvm_component_utils(pwm_base_test)
`uvm_component_new
@@ -18,7 +18,7 @@
// the run_phase; as such, nothing more needs to be done
virtual function void build_phase(uvm_phase phase);
max_quit_count = 50;
- test_timeout_ns = 600_000_000; // 600ms
+ test_timeout_ns = 600_000_000; // 600ms
super.build_phase(phase);
endfunction : build_phase
diff --git a/hw/ip/rstmgr/rtl/rstmgr_crash_info.sv b/hw/ip/rstmgr/rtl/rstmgr_crash_info.sv
index a0db25c..ed9ecdb 100644
--- a/hw/ip/rstmgr/rtl/rstmgr_crash_info.sv
+++ b/hw/ip/rstmgr/rtl/rstmgr_crash_info.sv
@@ -10,7 +10,7 @@
import rstmgr_reg_pkg::IdxWidth;
import rstmgr_reg_pkg::RdWidth;
#(
- parameter int CrashDumpWidth = 32,
+ parameter int CrashDumpWidth = 32,
localparam int CrashRemainder = CrashDumpWidth % RdWidth > 0 ? 1 : 0,
localparam int CrashStoreSlot = CrashDumpWidth / RdWidth + CrashRemainder,
localparam int SlotCntWidth = $clog2(CrashStoreSlot)
@@ -26,7 +26,7 @@
localparam int TotalWidth = CrashStoreSlot * RdWidth;
logic [2**SlotCntWidth-1:0][RdWidth-1:0] slots;
- logic [CrashStoreSlot-1:0][RdWidth-1:0] slots_q;
+ logic [ CrashStoreSlot-1:0][RdWidth-1:0] slots_q;
always_ff @(posedge clk_i or negedge rst_ni) begin
if (!rst_ni) begin
@@ -53,4 +53,4 @@
`ASSERT_INIT(CntStoreSlot_A, CrashStoreSlot < (1 << IdxWidth))
`ASSERT_INIT(CntWidth_A, SlotCntWidth <= IdxWidth)
-endmodule // rstmgr_crash_info
+endmodule // rstmgr_crash_info
diff --git a/hw/ip/tlul/generic_dv/tests/xbar_test_pkg.sv b/hw/ip/tlul/generic_dv/tests/xbar_test_pkg.sv
index 8726e07..bf15c66 100644
--- a/hw/ip/tlul/generic_dv/tests/xbar_test_pkg.sv
+++ b/hw/ip/tlul/generic_dv/tests/xbar_test_pkg.sv
@@ -2,7 +2,7 @@
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
- // ---------------------------------------------
+// ---------------------------------------------
// xBar test package
// ---------------------------------------------
package xbar_test_pkg;
diff --git a/hw/ip/usbdev/rtl/usbdev_pkg.sv b/hw/ip/usbdev/rtl/usbdev_pkg.sv
index 03bdd75..0abbd5c 100644
--- a/hw/ip/usbdev/rtl/usbdev_pkg.sv
+++ b/hw/ip/usbdev/rtl/usbdev_pkg.sv
@@ -7,11 +7,11 @@
// Code the state values so that the transitions software could poll are single bit
// Woken->Idle and WokenUon->Idle (after sw ack) should therefore be single bit changes
typedef enum logic [2:0] {
- AwkIdle = 3'b000,
- AwkTrigUon = 3'b011, // 2 bit change from Idle but sw not monitoring
- AwkTrigUoff = 3'b010, // ok with two bit change out because chip power is off
- AwkWokenUon = 3'b001, // one bit change in/out to TrigUon and Idle, chip off to Woken
- AwkWoken = 3'b100 // one bit change out to Idle, in has chip power off
+ AwkIdle = 3'b000,
+ AwkTrigUon = 3'b011, // 2 bit change from Idle but sw not monitoring
+ AwkTrigUoff = 3'b010, // ok with two bit change out because chip power is off
+ AwkWokenUon = 3'b001, // one bit change in/out to TrigUon and Idle, chip off to Woken
+ AwkWoken = 3'b100 // one bit change out to Idle, in has chip power off
} awk_state_e;
typedef awk_state_e awk_state_t;
diff --git a/util/verible-format-allowlist.txt b/util/verible-format-allowlist.txt
index 8e19380..587ca1b 100644
--- a/util/verible-format-allowlist.txt
+++ b/util/verible-format-allowlist.txt
@@ -8,11 +8,38 @@
hw/ip/adc_ctrl/dv/tests/adc_ctrl_test_pkg.sv
hw/ip/adc_ctrl/dv/env/adc_ctrl_env_pkg.sv
hw/ip/gpio/dv/tests/gpio_test_pkg.sv
+hw/dv/sv/alert_esc_agent/alert_esc_base_monitor.sv
+hw/dv/sv/alert_esc_agent/alert_esc_probe_if.sv
+hw/dv/sv/dv_utils/dv_test_status_pkg.sv
+hw/ip/tlul/generic_dv/tests/xbar_test_pkg.sv
+hw/ip/usbdev/rtl/usbdev_pkg.sv
+hw/ip/adc_ctrl/dv/env/adc_ctrl_env_cfg.sv
+hw/ip/adc_ctrl/dv/env/adc_ctrl_env_cov.sv
+hw/ip/adc_ctrl/dv/env/adc_ctrl_virtual_sequencer.sv
hw/ip/adc_ctrl/dv/env/seq_lib/adc_ctrl_vseq_list.sv
hw/ip/adc_ctrl/dv/env/seq_lib/adc_ctrl_smoke_vseq.sv
+hw/ip/adc_ctrl/dv/env/seq_lib/adc_ctrl_base_vseq.sv
+hw/ip/adc_ctrl/rtl/adc_ctrl.sv
+hw/ip/adc_ctrl/dv/tb.sv
+hw/ip/adc_ctrl/dv/tests/adc_ctrl_base_test.sv
hw/ip/prim_xilinx/rtl/prim_xilinx_buf.sv
+hw/ip/prim_xilinx/rtl/prim_xilinx_clock_gating.sv
+hw/ip/prim_xilinx/rtl/prim_xilinx_flop.sv
+hw/ip/prim_xilinx/rtl/prim_xilinx_clock_buf.sv
+hw/ip/prim_xilinx/rtl/prim_xilinx_clock_mux2.sv
+hw/ip/pwm/dv/env/pwm_env_cov.sv
+hw/ip/pwm/dv/env/pwm_virtual_sequencer.sv
+hw/ip/pwm/dv/env/seq_lib/pwm_base_vseq.sv
+hw/ip/pwm/dv/tests/pwm_base_test.sv
hw/ip/pwm/dv/tests/pwm_test_pkg.sv
hw/ip/pwm/dv/env/pwm_env_pkg.sv
hw/ip/pwm/dv/env/seq_lib/pwm_smoke_vseq.sv
hw/ip/pwm/dv/env/seq_lib/pwm_vseq_list.sv
+hw/ip/rstmgr/rtl/rstmgr_crash_info.sv
+hw/ip/gpio/dv/env/gpio_env.sv
+hw/ip/gpio/dv/env/gpio_env_cfg.sv
+hw/ip/gpio/dv/env/seq_lib/gpio_intr_rand_pgm_vseq.sv
+hw/ip/gpio/dv/tb/tb.sv
+hw/ip/gpio/dv/tests/gpio_base_test.sv
hw/ip/gpio/dv/env/seq_lib/gpio_vseq_list.sv
+hw/ip/pinmux/rtl/pinmux_jtag_buf.sv
