[dv/push-pull-agent] Fix async clock and reset issue

This PR fixes a corner case caused by reset and async clk.
If the async clk frequency is low and reset is toggled within a clock
cycle, the monitor might miss the reset condition. This PR fixed it by
adding two thread to check reset and clock.

Signed-off-by: Cindy Chen <chencindy@google.com>
diff --git a/hw/dv/sv/push_pull_agent/push_pull_monitor.sv b/hw/dv/sv/push_pull_agent/push_pull_monitor.sv
index e12b8fe..1d39b62 100644
--- a/hw/dv/sv/push_pull_agent/push_pull_monitor.sv
+++ b/hw/dv/sv/push_pull_agent/push_pull_monitor.sv
@@ -99,8 +99,9 @@
         req_port.write(item);
         // After picking up a request, wait until a response is sent before
         // detecting another request, as this is not a pipelined protocol.
-        while (!cfg.vif.mon_cb.ack && !in_reset) @(cfg.vif.mon_cb);
-      end
+        `DV_SPINWAIT_EXIT(while (!cfg.vif.mon_cb.ack) @(cfg.vif.mon_cb);,
+                          wait(in_reset))
+       end
     end
   endtask