[rtl, dv] added fusesoc core files
Added several fusesoc core files to reorg the sources. This has been
done to support #1565
Signed-off-by: Srikrishna Iyer <sriyer@google.com>
diff --git a/hw/ip/alert_handler/alert_handler.core b/hw/ip/alert_handler/alert_handler.core
index 9a0dd8b..52e07e2 100644
--- a/hw/ip/alert_handler/alert_handler.core
+++ b/hw/ip/alert_handler/alert_handler.core
@@ -8,37 +8,16 @@
filesets:
files_rtl:
depend:
- - lowrisc:ip:tlul
- - lowrisc:prim:all
- files:
- - rtl/alert_handler_reg_pkg.sv
- - rtl/alert_handler_reg_top.sv
- - rtl/alert_pkg.sv
- - rtl/alert_handler_reg_wrap.sv
- - rtl/alert_handler_class.sv
- - rtl/alert_handler_ping_timer.sv
- - rtl/alert_handler_esc_timer.sv
- - rtl/alert_handler_accu.sv
- - rtl/alert_handler.sv
- file_type: systemVerilogSource
+ - lowrisc:ip:alert_handler_reg
+ - lowrisc:ip:alert_handler_component
files_verilator_waiver:
depend:
- # common waivers
- - lowrisc:lint:common
- - lowrisc:lint:comportable
- files:
- - lint/alert_handler.vlt
- file_type: vlt
+ - lowrisc:ip:alert_handler_component
files_ascentlint_waiver:
depend:
- # common waivers
- - lowrisc:lint:common
- - lowrisc:lint:comportable
- files:
- - lint/alert_handler.waiver
- file_type: waiver
+ - lowrisc:ip:alert_handler_component
parameters:
diff --git a/hw/ip/alert_handler/alert_handler_component.core b/hw/ip/alert_handler/alert_handler_component.core
new file mode 100644
index 0000000..8955e76
--- /dev/null
+++ b/hw/ip/alert_handler/alert_handler_component.core
@@ -0,0 +1,47 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:ip:alert_handler_component:0.1"
+description: "Alert Handler component without the CSRs"
+
+filesets:
+ files_rtl:
+ depend:
+ - lowrisc:ip:tlul
+ - lowrisc:prim:all
+ files:
+ - rtl/alert_pkg.sv
+ - rtl/alert_handler_reg_wrap.sv
+ - rtl/alert_handler_class.sv
+ - rtl/alert_handler_ping_timer.sv
+ - rtl/alert_handler_esc_timer.sv
+ - rtl/alert_handler_accu.sv
+ - rtl/alert_handler.sv
+ file_type: systemVerilogSource
+
+ files_verilator_waiver:
+ depend:
+ # common waivers
+ - lowrisc:lint:common
+ - lowrisc:lint:comportable
+ files:
+ - lint/alert_handler.vlt
+ file_type: vlt
+
+ files_ascentlint_waiver:
+ depend:
+ # common waivers
+ - lowrisc:lint:common
+ - lowrisc:lint:comportable
+ files:
+ - lint/alert_handler.waiver
+ file_type: waiver
+
+
+targets:
+ default: &default_target
+ filesets:
+ - tool_verilator ? (files_verilator_waiver)
+ - tool_ascentlint ? (files_ascentlint_waiver)
+ - files_rtl
diff --git a/hw/ip/alert_handler/alert_handler_reg.core b/hw/ip/alert_handler/alert_handler_reg.core
new file mode 100644
index 0000000..3630de5
--- /dev/null
+++ b/hw/ip/alert_handler/alert_handler_reg.core
@@ -0,0 +1,21 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:ip:alert_handler_reg:0.1"
+description: "Auto-generated alert handler register sources with default parameters."
+filesets:
+ files_rtl:
+ depend:
+ - lowrisc:tlul:headers
+
+ files:
+ - rtl/alert_handler_reg_pkg.sv
+ - rtl/alert_handler_reg_top.sv
+ file_type: systemVerilogSource
+
+
+targets:
+ default: &default_target
+ filesets:
+ - files_rtl
diff --git a/hw/ip/pinmux/pinmux.core b/hw/ip/pinmux/pinmux.core
index 593d5ad..7320f3d 100644
--- a/hw/ip/pinmux/pinmux.core
+++ b/hw/ip/pinmux/pinmux.core
@@ -8,31 +8,16 @@
filesets:
files_rtl:
depend:
- - lowrisc:ip:tlul
- - lowrisc:prim:all
- files:
- - rtl/pinmux_reg_pkg.sv
- - rtl/pinmux_reg_top.sv
- - rtl/pinmux.sv
- file_type: systemVerilogSource
+ - lowrisc:ip:pinmux_reg
+ - lowrisc:ip:pinmux_component
files_verilator_waiver:
depend:
- # common waivers
- - lowrisc:lint:common
- - lowrisc:lint:comportable
- files:
- - lint/pinmux.vlt
- file_type: vlt
+ - lowrisc:ip:pinmux_component
files_ascentlint_waiver:
depend:
- # common waivers
- - lowrisc:lint:common
- - lowrisc:lint:comportable
- files:
- - lint/pinmux.waiver
- file_type: waiver
+ - lowrisc:ip:pinmux_component
parameters:
diff --git a/hw/ip/pinmux/pinmux_component.core b/hw/ip/pinmux/pinmux_component.core
new file mode 100644
index 0000000..e60b3d5
--- /dev/null
+++ b/hw/ip/pinmux/pinmux_component.core
@@ -0,0 +1,41 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:ip:pinmux_component:0.1"
+description: "Pin Multiplexer component without the CSRs"
+
+filesets:
+ files_rtl:
+ depend:
+ - lowrisc:ip:tlul
+ - lowrisc:prim:all
+ files:
+ - rtl/pinmux.sv
+ file_type: systemVerilogSource
+
+ files_verilator_waiver:
+ depend:
+ # common waivers
+ - lowrisc:lint:common
+ - lowrisc:lint:comportable
+ files:
+ - lint/pinmux.vlt
+ file_type: vlt
+
+ files_ascentlint_waiver:
+ depend:
+ # common waivers
+ - lowrisc:lint:common
+ - lowrisc:lint:comportable
+ files:
+ - lint/pinmux.waiver
+ file_type: waiver
+
+
+targets:
+ default: &default_target
+ filesets:
+ - tool_verilator ? (files_verilator_waiver)
+ - tool_ascentlint ? (files_ascentlint_waiver)
+ - files_rtl
diff --git a/hw/ip/pinmux/pinmux_reg.core b/hw/ip/pinmux/pinmux_reg.core
new file mode 100644
index 0000000..6744972
--- /dev/null
+++ b/hw/ip/pinmux/pinmux_reg.core
@@ -0,0 +1,21 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:ip:pinmux_reg:0.1"
+description: "Auto-generated pinmux register sources with default parameters."
+filesets:
+ files_rtl:
+ depend:
+ - lowrisc:tlul:headers
+
+ files:
+ - rtl/pinmux_reg_pkg.sv
+ - rtl/pinmux_reg_top.sv
+ file_type: systemVerilogSource
+
+
+targets:
+ default: &default_target
+ filesets:
+ - files_rtl
diff --git a/hw/ip/rv_plic/rv_plic.core b/hw/ip/rv_plic/rv_plic.core
index efb10ee..ef89761 100644
--- a/hw/ip/rv_plic/rv_plic.core
+++ b/hw/ip/rv_plic/rv_plic.core
@@ -8,8 +8,6 @@
filesets:
files_rtl:
depend:
- - lowrisc:ip:tlul
- - lowrisc:prim:all
- lowrisc:ip:rv_plic_component
files:
- rtl/rv_plic_reg_pkg.sv
@@ -19,19 +17,11 @@
files_verilator_waiver:
depend:
- # common waivers
- - lowrisc:lint:common
- #- lowrisc:lint:comportable
- files:
- file_type: vlt
+ - lowrisc:ip:rv_plic_component
files_ascentlint_waiver:
depend:
- # common waivers
- - lowrisc:lint:common
- #- lowrisc:lint:comportable
- files:
- file_type: waiver
+ - lowrisc:ip:rv_plic_component
parameters:
diff --git a/hw/ip/rv_plic/rv_plic_component.core b/hw/ip/rv_plic/rv_plic_component.core
index 638433b..05db359 100644
--- a/hw/ip/rv_plic/rv_plic_component.core
+++ b/hw/ip/rv_plic/rv_plic_component.core
@@ -3,7 +3,7 @@
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0
name: "lowrisc:ip:rv_plic_component:0.1"
-description: "RISC-V PLIC"
+description: "RISC-V PLIC component without the CSRs"
filesets:
files_rtl:
diff --git a/hw/top_earlgrey/dv/Makefile b/hw/top_earlgrey/dv/Makefile
index 11be68e..41335b8 100644
--- a/hw/top_earlgrey/dv/Makefile
+++ b/hw/top_earlgrey/dv/Makefile
@@ -24,6 +24,12 @@
RAL_PKG_NAME ?= chip
RAL_TOOL_OPTS += --top
+# Common build options.
+# Enable the RISC-V Formal Interface (RVFI) for the ibex tracer.
+BUILD_OPTS += +define+RVFI=1
+# Use generic implementations of prim modules.
+BUILD_OPTS += +define+PRIM_DEFAULT_IMPL=prim_pkg::ImplGeneric
+
####################################################################################################
## A D D I N D I V I D U A L T E S T S B E L O W ##
####################################################################################################
diff --git a/hw/top_earlgrey/dv/chip_sim.core b/hw/top_earlgrey/dv/chip_sim.core
index 7e25831..4c65a19 100644
--- a/hw/top_earlgrey/dv/chip_sim.core
+++ b/hw/top_earlgrey/dv/chip_sim.core
@@ -7,32 +7,21 @@
filesets:
files_rtl:
depend:
- - lowrisc:systems:top_earlgrey:0.1
- - lowrisc:ibex:ibex_tracer:0.1
- files:
- - ../rtl/top_earlgrey_asic.sv
- - ../ip/xbar_main/dv/autogen/xbar_main_bind.sv
- - ../ip/xbar_peri/dv/autogen/xbar_peri_bind.sv
- file_type: systemVerilogSource
+ - lowrisc:systems:top_earlgrey_asic
files_dv:
depend:
- lowrisc:dv:chip_test
+ - lowrisc:dv:xbar_main_bind
+ - lowrisc:dv:xbar_peri_bind
files:
- tb/chip_hier_macros.svh: {is_include_file: true}
- tb/tb.sv
file_type: systemVerilogSource
-parameters:
- RVFI:
- datatype: bool
- paramtype: vlogdefine
targets:
sim:
- parameters:
- # The RISC-V Formal Interface (RVFI) is needed for the tracer
- - RVFI=true
toplevel: tb
filesets:
- files_rtl
diff --git a/hw/top_earlgrey/dv/chip_sim_cfg.hjson b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
index c36928b..86695f1 100644
--- a/hw/top_earlgrey/dv/chip_sim_cfg.hjson
+++ b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
@@ -42,6 +42,12 @@
// Additional option to RAL generation for top level.
gen_ral_pkg_opts: ["--top"]
+ // Add default build_opts.
+ build_opts: [// Enable the RISC-V Formal Interface (RVFI) for the ibex tracer.
+ "+define+RVFI=1",
+ // Use generic implementations of prim modules.
+ "+define+PRIM_DEFAULT_IMPL=prim_pkg::ImplGeneric"]
+
// Add run modes.
run_modes: [
{
diff --git a/hw/top_earlgrey/dv/env/chip_env.core b/hw/top_earlgrey/dv/env/chip_env.core
index 0af2f46..cbcb1de 100644
--- a/hw/top_earlgrey/dv/env/chip_env.core
+++ b/hw/top_earlgrey/dv/env/chip_env.core
@@ -32,6 +32,7 @@
- seq_lib/chip_common_vseq.sv: {is_include_file: true}
file_type: systemVerilogSource
+
targets:
default:
filesets:
diff --git a/hw/top_earlgrey/ip/alert_handler/alert_handler_reg.core b/hw/top_earlgrey/ip/alert_handler/alert_handler_reg.core
new file mode 100644
index 0000000..aeea58f
--- /dev/null
+++ b/hw/top_earlgrey/ip/alert_handler/alert_handler_reg.core
@@ -0,0 +1,21 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:top_earlgrey:alert_handler_reg:0.1"
+description: "Auto-generated alert handler register sources for top_earlgrey chip."
+filesets:
+ files_rtl:
+ depend:
+ - lowrisc:tlul:headers
+
+ files:
+ - rtl/autogen/alert_handler_reg_pkg.sv
+ - rtl/autogen/alert_handler_reg_top.sv
+ file_type: systemVerilogSource
+
+
+targets:
+ default: &default_target
+ filesets:
+ - files_rtl
diff --git a/hw/top_earlgrey/ip/pinmux/pinmux_reg.core b/hw/top_earlgrey/ip/pinmux/pinmux_reg.core
new file mode 100644
index 0000000..957beb4
--- /dev/null
+++ b/hw/top_earlgrey/ip/pinmux/pinmux_reg.core
@@ -0,0 +1,21 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:top_earlgrey:pinmux_reg:0.1"
+description: "Auto-generated pinmux register sources for top_earlgrey chip."
+filesets:
+ files_rtl:
+ depend:
+ - lowrisc:tlul:headers
+
+ files:
+ - rtl/autogen/pinmux_reg_pkg.sv
+ - rtl/autogen/pinmux_reg_top.sv
+ file_type: systemVerilogSource
+
+
+targets:
+ default: &default_target
+ filesets:
+ - files_rtl
diff --git a/hw/top_earlgrey/ip/rv_plic/rv_plic.core b/hw/top_earlgrey/ip/rv_plic/rv_plic.core
new file mode 100644
index 0000000..f278a5c
--- /dev/null
+++ b/hw/top_earlgrey/ip/rv_plic/rv_plic.core
@@ -0,0 +1,22 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:top_earlgrey:rv_plic:0.1"
+description: "RISC-V PLIC sources top_earlgrey chip."
+filesets:
+ files_rtl:
+ depend:
+ - lowrisc:ip:rv_plic_component
+
+ files:
+ - rtl/autogen/rv_plic_reg_pkg.sv
+ - rtl/autogen/rv_plic_reg_top.sv
+ - rtl/autogen/rv_plic.sv
+ file_type: systemVerilogSource
+
+
+targets:
+ default: &default_target
+ filesets:
+ - files_rtl
diff --git a/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_main_sim.core b/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_main_sim.core
index 5640ef0..8c89b00 100644
--- a/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_main_sim.core
+++ b/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_main_sim.core
@@ -12,8 +12,8 @@
- lowrisc:ip:xbar_main
- lowrisc:dv:dv_utils
- lowrisc:dv:xbar_tb
+ - lowrisc:dv:xbar_main_bind
files:
- - xbar_main_bind.sv
- tb__xbar_connect.sv: {is_include_file: true}
- xbar_env_pkg__params.sv: {is_include_file: true}
file_type: systemVerilogSource
diff --git a/hw/top_earlgrey/ip/xbar_main/dv/xbar_main_bind.core b/hw/top_earlgrey/ip/xbar_main/dv/xbar_main_bind.core
new file mode 100644
index 0000000..6c84eeb
--- /dev/null
+++ b/hw/top_earlgrey/ip/xbar_main/dv/xbar_main_bind.core
@@ -0,0 +1,17 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:dv:xbar_main_bind:0.1"
+description: "XBAR main assertion bind"
+filesets:
+ files_dv:
+ files:
+ - autogen/xbar_main_bind.sv
+ file_type: systemVerilogSource
+
+
+targets:
+ default: &default_target
+ filesets:
+ - files_dv
diff --git a/hw/top_earlgrey/ip/xbar_main/rtl/autogen/xbar_main.core b/hw/top_earlgrey/ip/xbar_main/rtl/autogen/xbar_main.core
index 98e89db..ae5f028 100644
--- a/hw/top_earlgrey/ip/xbar_main/rtl/autogen/xbar_main.core
+++ b/hw/top_earlgrey/ip/xbar_main/rtl/autogen/xbar_main.core
@@ -16,6 +16,7 @@
- xbar_main.sv
file_type: systemVerilogSource
+
targets:
default: &default_target
filesets:
diff --git a/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_peri_sim.core b/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_peri_sim.core
index d8a58c2..d814523 100644
--- a/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_peri_sim.core
+++ b/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_peri_sim.core
@@ -12,8 +12,8 @@
- lowrisc:ip:xbar_peri
- lowrisc:dv:dv_utils
- lowrisc:dv:xbar_tb
+ - lowrisc:dv:xbar_peri_bind
files:
- - xbar_peri_bind.sv
- tb__xbar_connect.sv: {is_include_file: true}
- xbar_env_pkg__params.sv: {is_include_file: true}
file_type: systemVerilogSource
diff --git a/hw/top_earlgrey/ip/xbar_peri/dv/xbar_peri_bind.core b/hw/top_earlgrey/ip/xbar_peri/dv/xbar_peri_bind.core
new file mode 100644
index 0000000..0384f06
--- /dev/null
+++ b/hw/top_earlgrey/ip/xbar_peri/dv/xbar_peri_bind.core
@@ -0,0 +1,17 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:dv:xbar_peri_bind:0.1"
+description: "XBAR peri assertion bind"
+filesets:
+ files_dv:
+ files:
+ - autogen/xbar_peri_bind.sv
+ file_type: systemVerilogSource
+
+
+targets:
+ default: &default_target
+ filesets:
+ - files_dv
diff --git a/hw/top_earlgrey/ip/xbar_peri/rtl/autogen/xbar_peri.core b/hw/top_earlgrey/ip/xbar_peri/rtl/autogen/xbar_peri.core
index 4bb54bb..8aea20f 100644
--- a/hw/top_earlgrey/ip/xbar_peri/rtl/autogen/xbar_peri.core
+++ b/hw/top_earlgrey/ip/xbar_peri/rtl/autogen/xbar_peri.core
@@ -16,6 +16,7 @@
- xbar_peri.sv
file_type: systemVerilogSource
+
targets:
default: &default_target
filesets:
diff --git a/hw/top_earlgrey/top_earlgrey.core b/hw/top_earlgrey/top_earlgrey.core
index bf7630e..46b126e 100644
--- a/hw/top_earlgrey/top_earlgrey.core
+++ b/hw/top_earlgrey/top_earlgrey.core
@@ -8,10 +8,14 @@
files_rtl_generic:
depend:
- lowrisc:ip:uart:0.1
+ - lowrisc:top_earlgrey:alert_handler_reg
+ - lowrisc:ip:alert_handler_component
- lowrisc:ip:gpio
- lowrisc:ip:rv_core_ibex
- lowrisc:ip:rv_dm
- - lowrisc:ip:rv_plic_component
+ - lowrisc:top_earlgrey:rv_plic
+ - lowrisc:top_earlgrey:pinmux_reg
+ - lowrisc:ip:pinmux_component
- lowrisc:ip:rv_timer
- lowrisc:ip:tlul
- lowrisc:ip:spi_device
@@ -24,26 +28,9 @@
- lowrisc:constants:top_pkg
- lowrisc:ip:nmi_gen
- lowrisc:ip:usbdev
+ - lowrisc:ip:xbar_main
+ - lowrisc:ip:xbar_peri
files:
- - ip/xbar_main/rtl/autogen/tl_main_pkg.sv
- - ip/xbar_main/rtl/autogen/xbar_main.sv
- - ip/xbar_peri/rtl/autogen/tl_peri_pkg.sv
- - ip/xbar_peri/rtl/autogen/xbar_peri.sv
- - ip/rv_plic/rtl/autogen/rv_plic_reg_pkg.sv
- - ip/rv_plic/rtl/autogen/rv_plic_reg_top.sv
- - ip/rv_plic/rtl/autogen/rv_plic.sv
- - ip/pinmux/rtl/autogen/pinmux_reg_pkg.sv
- - ip/pinmux/rtl/autogen/pinmux_reg_top.sv
- - ../ip/pinmux/rtl/pinmux.sv
- - ip/alert_handler/rtl/autogen/alert_handler_reg_pkg.sv
- - ip/alert_handler/rtl/autogen/alert_handler_reg_top.sv
- - ../ip/alert_handler/rtl/alert_pkg.sv
- - ../ip/alert_handler/rtl/alert_handler_reg_wrap.sv
- - ../ip/alert_handler/rtl/alert_handler_class.sv
- - ../ip/alert_handler/rtl/alert_handler_ping_timer.sv
- - ../ip/alert_handler/rtl/alert_handler_esc_timer.sv
- - ../ip/alert_handler/rtl/alert_handler_accu.sv
- - ../ip/alert_handler/rtl/alert_handler.sv
- rtl/padctl.sv
- rtl/autogen/top_earlgrey.sv
file_type: systemVerilogSource
diff --git a/hw/top_earlgrey/top_earlgrey_asic.core b/hw/top_earlgrey/top_earlgrey_asic.core
new file mode 100644
index 0000000..0db3e1a
--- /dev/null
+++ b/hw/top_earlgrey/top_earlgrey_asic.core
@@ -0,0 +1,20 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:systems:top_earlgrey_asic:0.1"
+description: "Earl Grey toplevel for DV simulations"
+filesets:
+ files_rtl:
+ depend:
+ - lowrisc:systems:top_earlgrey:0.1
+ - lowrisc:ibex:ibex_tracer:0.1
+ files:
+ - rtl/top_earlgrey_asic.sv
+ file_type: systemVerilogSource
+
+
+targets:
+ default: &default_target
+ filesets:
+ - files_rtl
diff --git a/util/tlgen/xbar.core.tpl b/util/tlgen/xbar.core.tpl
index 1f115a1..e2ed6fb 100644
--- a/util/tlgen/xbar.core.tpl
+++ b/util/tlgen/xbar.core.tpl
@@ -16,6 +16,7 @@
- xbar_${xbar.name}.sv
file_type: systemVerilogSource
+
targets:
default: &default_target
filesets:
diff --git a/util/tlgen/xbar.sim.core.tpl b/util/tlgen/xbar.sim.core.tpl
index 15b007b..1ae4a59 100644
--- a/util/tlgen/xbar.sim.core.tpl
+++ b/util/tlgen/xbar.sim.core.tpl
@@ -12,12 +12,13 @@
- lowrisc:ip:xbar_${xbar.name}
- lowrisc:dv:dv_utils
- lowrisc:dv:xbar_tb
+ - lowrisc:dv:xbar_${xbar.name}_bind
files:
- - xbar_${xbar.name}_bind.sv
- tb__xbar_connect.sv: {is_include_file: true}
- xbar_env_pkg__params.sv: {is_include_file: true}
file_type: systemVerilogSource
+
targets:
sim:
toplevel: xbar_tb_top
