| commit | 5e417b8f17e5e06f66ef43a907de252d1fe0b924 | [log] [tgz] |
|---|---|---|
| author | Weicai Yang <weicai@google.com> | Wed Oct 14 16:34:08 2020 -0700 |
| committer | weicaiyang <49293026+weicaiyang@users.noreply.github.com> | Thu Oct 15 13:50:43 2020 -0700 |
| tree | b56c25c1ec7f4fd8cf082a16adedf3e5d945e30c | |
| parent | 1a0b2d0e7e8282d471b68e4abab51ca8600a2d71 [diff] |
[uart/dv] Improve uart run time performace spinwait consumes most of the sim time when uart freq is lowest and core clk freq is highest. Add spinwait_delay_ns to reduce the frequency of polling tx/rx_idle It runs 4x faster with vcs in this case now Signed-off-by: Weicai Yang <weicai@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).