commit | 5e04deddd4b79a925fe031b8f212beafd7b2132a | [log] [tgz] |
---|---|---|
author | Philipp Wagner <phw@lowrisc.org> | Wed Oct 27 22:55:59 2021 +0100 |
committer | weicaiyang <49293026+weicaiyang@users.noreply.github.com> | Wed Oct 27 18:57:14 2021 -0700 |
tree | 0c5bd7d5b7f5712dca3a8a3bee9dd134801ea7f7 | |
parent | 351ff1a4dfb698171f0c4d684c2309d75961318e [diff] |
Revert "[ spi_host ] Flag non-allowed write events as errors" This reverts commit 3193d73abd2f41dca02f376d70c0e070d7cfcec9. This commit broke private CI: ``` * `UVM_ERROR (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (* [*] vs * [*]) Regname: chip_reg_block.spi_host*.error_status` has 1 failures: * Test chip_csr_rw has 1 failures. * 0.chip_csr_rw.1\ Line 130, in log /azp/agent/_work/1/s/scratch/HEAD/chip_earlgrey_asic-sim-vcs/0.chip_csr_rw/out/run.log UVM_ERROR @ 1081370000 ps: (csr_utils_pkg.sv:466) [csr_utils::csr_rd_check] Check failed obs == exp (8 [0x8] vs 0 [0x0]) Regname: chip_reg_block.spi_host1.error_status UVM_INFO @ 1081370000 ps: (uvm_report_server.svh:901) [UVM/REPORT/SERVER] --- UVM Report Summary --- Quit count reached! ``` The PR itself was green, so probably a mid-air collision. Signed-off-by: Philipp Wagner <phw@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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