| commit | 5de89cb806ed4deff8970c833551063bb294b972 | [log] [tgz] |
|---|---|---|
| author | Rupert Swarbrick <rswarbrick@lowrisc.org> | Thu Apr 08 14:40:15 2021 +0100 |
| committer | Rupert Swarbrick <rswarbrick@gmail.com> | Thu Apr 08 17:25:41 2021 +0100 |
| tree | 501b9f03077d200a0a812e50ed55290ebb134ca1 | |
| parent | 55ef1a6e3d1555e5f303059ddd8b3e58c15636a7 [diff] |
[sram_ctrl] Use the correct tl_instr_en_e This enum type is defined in both sram_ctrl_pkg.sv (as an 8-bit type with values EnSramIfetch and DisSramIfetch) and in tlul_pkg.sv (as a 3-bit type with values InstrEn and InstrDis). Importing the tlul_pkg version into scope in sram_ctrl is actually a spec violation (SystemVerilog doesn't do shadowing, so you're not allowed to import two things that clash) and also happens to confuse Verilator's width inference. Fortunately, everything sort of worked because the external ports used the narrower type and the enum values had the same bottom bits, but it was all a bit magic and kind of worked by luck. This patch explicitly qualifies the name when we use tlul_pkg::tl_instr_en_e, which should sort everything out. Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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