| commit | 5accf7099955a32222ccbbe43e410d1c284fe1ef | [log] [tgz] |
|---|---|---|
| author | Sam Elliott <selliott@lowrisc.org> | Mon May 11 18:59:22 2020 +0100 |
| committer | Garret Kelly <Garret.Kelly@gmail.com> | Tue May 19 08:28:41 2020 -0400 |
| tree | 50d9c5f7ea43481993da801d3c2740a897f71a92 | |
| parent | 519f746250eedbff5b49932aa10b398788e3bfc0 [diff] |
[topgen] Add Macros for Memory Info This commit adds `TOP_EARLGREY_<mem>_BASE_ADDR` and `TOP_EARLGREY_<mem>_SIZE_BYTES` definitions for all memories in the top-level system. This commit also clarifies some of the wording around the peripheral definitions (so that they're obviously peripherals not memory), and adds the _SIZE_BYTES definitions for peripherals, including a comment on what they represent. This may be used later if `mmio.h` ever does bounds checking on its pointer arithmetic. Signed-off-by: Sam Elliott <selliott@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).