commit | 5a50bfe4e2267ba1656cb18470b12f18b136c6ee | [log] [tgz] |
---|---|---|
author | Prajwala Puttappa <prajwalaputtappa@lowrisc.org> | Fri Apr 08 13:20:25 2022 +0100 |
committer | Rupert Swarbrick <rswarbrick@gmail.com> | Tue Apr 12 16:30:50 2022 +0100 |
tree | e79ec04321f21f1bcae13f90f8756525a74d7f4f | |
parent | 98636adbc82019a5d031d3c9183b44a85e6cc341 [diff] |
[otbn, dv] Added a test to escalate software error to fatal errors This commit adds a new testcase called otbn_sw_errs_fatal_chk. This test sets the software_errs_fatal bit in ctrl register to escalate software errors to fatal errors. This commit also adds required functions to set software_errs_fatal flag in ISS model and if this bit is set in the model, the model goes to locked state. Signed-off-by: Prajwala Puttappa <prajwalaputtappa@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at [CONTRIBUTING]({{< relref “CONTRIBUTING.md” >}}) and our documentation on project organization and processes for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).