[entropy_src/dv] efuse changes
Signed-off-by: Steve Nelson <steve.nelson@wdc.com>
diff --git a/hw/ip/entropy_src/data/entropy_src_testplan.hjson b/hw/ip/entropy_src/data/entropy_src_testplan.hjson
index 74ac5f0..ed01629 100644
--- a/hw/ip/entropy_src/data/entropy_src_testplan.hjson
+++ b/hw/ip/entropy_src/data/entropy_src_testplan.hjson
@@ -22,7 +22,7 @@
Verify es_regen bit enables/disables write access to control registers
'''
milestone: V2
- tests: ["entropy_src_firmware"]
+ tests: []
}
{
name: lfsr_mode
@@ -33,7 +33,7 @@
Verify rng activity does not affect lfsr operation.
'''
milestone: V2
- tests: ["entropy_src_lfsr"]
+ tests: []
}
{
name: rng_mode
@@ -58,14 +58,14 @@
Verify alerts
'''
milestone: V2
- tests: ["entropy_src_health_checks"]
+ tests: []
}
{
name: interrupts
desc: '''
Verify all entropy_src interrupts assert/clear when expected.'''
milestone: V2
- tests: ["entropy_src_interrupts"]
+ tests: []
}
{
name: stress_all
diff --git a/hw/ip/entropy_src/dv/entropy_src_sim_cfg.hjson b/hw/ip/entropy_src/dv/entropy_src_sim_cfg.hjson
index a334738..d0122ef 100644
--- a/hw/ip/entropy_src/dv/entropy_src_sim_cfg.hjson
+++ b/hw/ip/entropy_src/dv/entropy_src_sim_cfg.hjson
@@ -48,6 +48,7 @@
tests: [
{
name: entropy_src_smoke
+ uvm_test: entropy_src_smoke_test
uvm_test_seq: entropy_src_smoke_vseq
}
diff --git a/hw/ip/entropy_src/dv/env/entropy_src_env_cfg.sv b/hw/ip/entropy_src/dv/env/entropy_src_env_cfg.sv
index 736441f..bb1f4d1 100644
--- a/hw/ip/entropy_src/dv/env/entropy_src_env_cfg.sv
+++ b/hw/ip/entropy_src/dv/env/entropy_src_env_cfg.sv
@@ -7,14 +7,23 @@
`uvm_object_utils_begin(entropy_src_env_cfg)
`uvm_object_utils_end
- // ext component cfgs
+ `uvm_object_new
+
+ // Ext component cfgs
rand push_pull_agent_cfg#(.HostDataWidth(entropy_src_pkg::RNG_BUS_WIDTH)) m_rng_agent_cfg;
rand push_pull_agent_cfg#(.HostDataWidth(FIPS_CSRNG_BUS_WIDTH)) m_csrng_agent_cfg;
virtual pins_if efuse_es_sw_reg_en_vif;
- `uvm_object_new
+ // Knobs & Weights
+ uint efuse_es_sw_reg_en_pct;
+ rand bit efuse_es_sw_reg_en;
+ // Constraints
+ constraint c_efuse_es_sw_reg_en {efuse_es_sw_reg_en dist { 1 :/ efuse_es_sw_reg_en_pct,
+ 0 :/ (100 - efuse_es_sw_reg_en_pct) };}
+
+ // Functions
virtual function void initialize(bit [31:0] csr_base_addr = '1);
list_of_alerts = entropy_src_env_pkg::LIST_OF_ALERTS;
super.initialize(csr_base_addr);
@@ -34,4 +43,16 @@
end
endfunction
+ virtual function string convert2string();
+ string str = "";
+ str = {str, "\n"};
+ str = {str, $sformatf("\n\t |********** entropy_src_env_cfg **********| \t") };
+ str = {str, $sformatf("\n\t |***** efuse_es_sw_reg_en : %3d *****| \t", efuse_es_sw_reg_en) };
+ str = {str, $sformatf("\n\t |---------- knobs ------------------------| \t") };
+ str = {str, $sformatf("\n\t |***** efuse_es_sw_reg_en_pct : %3d *****| \t", efuse_es_sw_reg_en_pct)};
+ str = {str, $sformatf("\n\t |*****************************************| \t") };
+ str = {str, "\n"};
+ return str;
+ endfunction
+
endclass
diff --git a/hw/ip/entropy_src/dv/env/seq_lib/entropy_src_base_vseq.sv b/hw/ip/entropy_src/dv/env/seq_lib/entropy_src_base_vseq.sv
index a7d90b5..063283e 100644
--- a/hw/ip/entropy_src/dv/env/seq_lib/entropy_src_base_vseq.sv
+++ b/hw/ip/entropy_src/dv/env/seq_lib/entropy_src_base_vseq.sv
@@ -10,8 +10,6 @@
);
`uvm_object_utils(entropy_src_base_vseq)
- bit efuse_es_sw_reg_en = 1'b1;
-
// various knobs to enable certain routines
bit do_entropy_src_init = 1'b1;
@@ -29,7 +27,8 @@
// setup basic entropy_src features
virtual task entropy_src_init();
- cfg.efuse_es_sw_reg_en_vif.drive_pin(.idx(0), .val(efuse_es_sw_reg_en));
+
+ cfg.efuse_es_sw_reg_en_vif.drive_pin(.idx(0), .val(cfg.efuse_es_sw_reg_en));
endtask
endclass : entropy_src_base_vseq
diff --git a/hw/ip/entropy_src/dv/tests/entropy_src_base_test.sv b/hw/ip/entropy_src/dv/tests/entropy_src_base_test.sv
index 9c8acd4..f8e2b61 100644
--- a/hw/ip/entropy_src/dv/tests/entropy_src_base_test.sv
+++ b/hw/ip/entropy_src/dv/tests/entropy_src_base_test.sv
@@ -12,15 +12,22 @@
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
+
+ configure_env();
endfunction // build_phase
// the base class dv_base_test creates the following instances:
// entropy_src_env_cfg: cfg
// entropy_src_env: env
-
// the base class also looks up UVM_TEST_SEQ plusarg to create and run that seq in
// the run_phase; as such, nothing more needs to be done
+ // The following knob settings will serve as the defaults.
+ // Overrides should happen in the specific testcase.
+ virtual function void configure_env();
+ cfg.efuse_es_sw_reg_en_pct = 100;
+ endfunction
+
endclass : entropy_src_base_test
diff --git a/hw/ip/entropy_src/dv/tests/entropy_src_smoke_test.sv b/hw/ip/entropy_src/dv/tests/entropy_src_smoke_test.sv
new file mode 100644
index 0000000..33a8b18
--- /dev/null
+++ b/hw/ip/entropy_src/dv/tests/entropy_src_smoke_test.sv
@@ -0,0 +1,16 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+class entropy_src_smoke_test extends entropy_src_base_test;
+
+ `uvm_component_utils(entropy_src_smoke_test)
+ `uvm_component_new
+
+ function void configure_env();
+ super.configure_env();
+
+ `DV_CHECK_RANDOMIZE_FATAL(cfg)
+ `uvm_info(`gfn, $sformatf("%s", cfg.convert2string()), UVM_LOW)
+ endfunction
+endclass : entropy_src_smoke_test
diff --git a/hw/ip/entropy_src/dv/tests/entropy_src_test.core b/hw/ip/entropy_src/dv/tests/entropy_src_test.core
index 3947e8f..5bec8c2 100644
--- a/hw/ip/entropy_src/dv/tests/entropy_src_test.core
+++ b/hw/ip/entropy_src/dv/tests/entropy_src_test.core
@@ -11,6 +11,7 @@
files:
- entropy_src_test_pkg.sv
- entropy_src_base_test.sv: {is_include_file: true}
+ - entropy_src_smoke_test.sv: {is_include_file: true}
file_type: systemVerilogSource
targets:
diff --git a/hw/ip/entropy_src/dv/tests/entropy_src_test_pkg.sv b/hw/ip/entropy_src/dv/tests/entropy_src_test_pkg.sv
index 36f8f39..7bce84e 100644
--- a/hw/ip/entropy_src/dv/tests/entropy_src_test_pkg.sv
+++ b/hw/ip/entropy_src/dv/tests/entropy_src_test_pkg.sv
@@ -18,5 +18,6 @@
// package sources
`include "entropy_src_base_test.sv"
+ `include "entropy_src_smoke_test.sv"
endpackage
