commit 571196deff2682a5bdc509bd2fb440014fa1eaca
author Rupert Swarbrick <rswarbrick@lowrisc.org> Tue Apr 06 16:50:31 2021 +0100
committer Rupert Swarbrick <rswarbrick@gmail.com> Wed Apr 07 13:12:01 2021 +0100
tree 649a23664b70c70b9923eebd2474ddb73b4a8444
parent f0f5f69279e51983c6e1d98873c66a0bebca75a0

[otp_ctrl,lint] Use explicit cast for round count in otp_ctrl_scrmbl

This silences a Verilator width mismatch warning.

Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>

hw/ip/otp_ctrl/rtl/otp_ctrl_scrmbl.sv

diff --git a/hw/ip/otp_ctrl/rtl/otp_ctrl_scrmbl.sv b/hw/ip/otp_ctrl/rtl/otp_ctrl_scrmbl.sv
index dc600ed..c7eabef 100644
--- a/hw/ip/otp_ctrl/rtl/otp_ctrl_scrmbl.sv
+++ b/hw/ip/otp_ctrl/rtl/otp_ctrl_scrmbl.sv
@@ -219,6 +219,9 @@
   } state_e;
 
   localparam int CntWidth = $clog2(NumPresentRounds+1);
+  localparam int unsigned LastPresentRoundInt = NumPresentRounds - 1;
+  localparam bit [CntWidth-1:0] LastPresentRound = LastPresentRoundInt[CntWidth-1:0];
+
   state_e state_d, state_q;
   logic [CntWidth-1:0] cnt_d, cnt_q;
   logic cnt_clr, cnt_en;
@@ -308,7 +311,7 @@
         data_state_en  = 1'b1;
         key_state_en   = 1'b1;
         cnt_en         = 1'b1;
-        if (cnt_q == NumPresentRounds-1) begin
+        if (cnt_q == LastPresentRound) begin
           state_d = IdleSt;
           valid_d = 1'b1;
         end
@@ -321,7 +324,7 @@
         data_state_en  = 1'b1;
         key_state_en   = 1'b1;
         cnt_en         = 1'b1;
-        if (cnt_q == NumPresentRounds-1) begin
+        if (cnt_q == LastPresentRound) begin
           state_d = IdleSt;
           valid_d = 1'b1;
         end
@@ -335,7 +338,7 @@
         data_state_en  = 1'b1;
         key_state_en   = 1'b1;
         cnt_en         = 1'b1;
-        if (cnt_q == NumPresentRounds-1) begin
+        if (cnt_q == LastPresentRound) begin
           state_d = IdleSt;
           valid_d = 1'b1;
           // Apply XOR for Davies-Meyer construction.