[prim] Add a few prim cells needed for clock / resets

- Reference prim_flops directly from prim_flop_2sync
  - This might be pointless as long term it would probably be better
    to make prim_flop_2sync an abstract cell

Signed-off-by: Timothy Chen <timothytim@google.com>

[prim] update prim_flop

Signed-off-by: Timothy Chen <timothytim@google.com>

[prim] Change prim_flop_2sync to a primgen cell

Signed-off-by: Timothy Chen <timothytim@google.com>

[prim] fix comment

Signed-off-by: Timothy Chen <timothytim@google.com>
diff --git a/hw/ip/prim/prim.core b/hw/ip/prim/prim.core
index 11027e4..1e39fec 100644
--- a/hw/ip/prim/prim.core
+++ b/hw/ip/prim/prim.core
@@ -15,6 +15,8 @@
       - lowrisc:prim:pad_wrapper
       - lowrisc:prim:prim_pkg
       - lowrisc:prim:clock_mux2
+      - lowrisc:prim:flop
+      - lowrisc:prim:flop_2sync
     files:
       - rtl/prim_clock_inverter.sv
       - rtl/prim_clock_gating_sync.sv
@@ -29,7 +31,6 @@
       - rtl/prim_sram_arbiter.sv
       - rtl/prim_fifo_async.sv
       - rtl/prim_fifo_sync.sv
-      - rtl/prim_flop_2sync.sv
       - rtl/prim_sync_reqack.sv
       - rtl/prim_keccak.sv
       - rtl/prim_packer.sv
diff --git a/hw/ip/prim/prim_clock_buf.core b/hw/ip/prim/prim_clock_buf.core
new file mode 100644
index 0000000..724a29e
--- /dev/null
+++ b/hw/ip/prim/prim_clock_buf.core
@@ -0,0 +1,25 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: "lowrisc:prim:clock_buf"
+description: "Generic clock buffer"
+filesets:
+  primgen_dep:
+    depend:
+      - lowrisc:prim:prim_pkg
+      - lowrisc:prim:primgen
+
+generate:
+  impl:
+    generator: primgen
+    parameters:
+      prim_name: clock_buf
+
+targets:
+  default:
+    filesets:
+      - primgen_dep
+    generate:
+      - impl
diff --git a/hw/ip/prim/prim_flop.core b/hw/ip/prim/prim_flop.core
new file mode 100644
index 0000000..e007e9f
--- /dev/null
+++ b/hw/ip/prim/prim_flop.core
@@ -0,0 +1,25 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: "lowrisc:prim:flop"
+description: "Generic flop"
+filesets:
+  primgen_dep:
+    depend:
+      - lowrisc:prim:prim_pkg
+      - lowrisc:prim:primgen
+
+generate:
+  impl:
+    generator: primgen
+    parameters:
+      prim_name: flop
+
+targets:
+  default:
+    filesets:
+      - primgen_dep
+    generate:
+      - impl
diff --git a/hw/ip/prim/prim_flop_2sync.core b/hw/ip/prim/prim_flop_2sync.core
new file mode 100644
index 0000000..b814a78
--- /dev/null
+++ b/hw/ip/prim/prim_flop_2sync.core
@@ -0,0 +1,25 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: "lowrisc:prim:flop_2sync"
+description: "Primitive synchronizer"
+filesets:
+  primgen_dep:
+    depend:
+      - lowrisc:prim:prim_pkg
+      - lowrisc:prim:primgen
+
+generate:
+  impl:
+    generator: primgen
+    parameters:
+      prim_name: flop_2sync
+
+targets:
+  default:
+    filesets:
+      - primgen_dep
+    generate:
+      - impl
diff --git a/hw/ip/prim/rtl/prim_flop_2sync.sv b/hw/ip/prim/rtl/prim_flop_2sync.sv
deleted file mode 100644
index 757fe18..0000000
--- a/hw/ip/prim/rtl/prim_flop_2sync.sv
+++ /dev/null
@@ -1,28 +0,0 @@
-// Copyright lowRISC contributors.
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-//
-// Generic double-synchronizer flop
-
-module prim_flop_2sync #(
-  parameter int Width      = 16,
-  parameter logic [Width-1:0] ResetValue = '0
-) (
-  input                    clk_i,    // receive clock
-  input                    rst_ni,
-  input        [Width-1:0] d,
-  output logic [Width-1:0] q
-);
-
-  logic [Width-1:0] intq;
-
-  always_ff @(posedge clk_i or negedge rst_ni)
-    if (!rst_ni) begin
-      intq <= ResetValue;
-      q    <= ResetValue;
-    end else begin
-      intq <= d;
-      q    <= intq;
-    end
-
-endmodule
diff --git a/hw/ip/prim_generic/prim_generic_clock_buf.core b/hw/ip/prim_generic/prim_generic_clock_buf.core
new file mode 100644
index 0000000..e51f32a
--- /dev/null
+++ b/hw/ip/prim_generic/prim_generic_clock_buf.core
@@ -0,0 +1,40 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: "lowrisc:prim_generic:clock_buf"
+description: "clock buffer"
+filesets:
+  files_rtl:
+    files:
+      - rtl/prim_generic_clock_buf.sv
+    file_type: systemVerilogSource
+
+  files_verilator_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+    files:
+    file_type: vlt
+
+  files_ascentlint_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+    files:
+    file_type: waiver
+
+  files_veriblelint_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+      - lowrisc:lint:comportable
+
+targets:
+  default:
+    filesets:
+      - tool_verilator   ? (files_verilator_waiver)
+      - tool_ascentlint  ? (files_ascentlint_waiver)
+      - tool_veriblelint ? (files_veriblelint_waiver)
+      - files_rtl
diff --git a/hw/ip/prim_generic/prim_generic_flop.core b/hw/ip/prim_generic/prim_generic_flop.core
new file mode 100644
index 0000000..e44b7b4
--- /dev/null
+++ b/hw/ip/prim_generic/prim_generic_flop.core
@@ -0,0 +1,40 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: "lowrisc:prim_generic:flop"
+description: "generic flop"
+filesets:
+  files_rtl:
+    files:
+      - rtl/prim_generic_flop.sv
+    file_type: systemVerilogSource
+
+  files_verilator_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+    files:
+    file_type: vlt
+
+  files_ascentlint_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+    files:
+    file_type: waiver
+
+  files_veriblelint_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+      - lowrisc:lint:comportable
+
+targets:
+  default:
+    filesets:
+      - tool_verilator   ? (files_verilator_waiver)
+      - tool_ascentlint  ? (files_ascentlint_waiver)
+      - tool_veriblelint ? (files_veriblelint_waiver)
+      - files_rtl
diff --git a/hw/ip/prim_generic/prim_generic_flop_2sync.core b/hw/ip/prim_generic/prim_generic_flop_2sync.core
new file mode 100644
index 0000000..d9c3b93
--- /dev/null
+++ b/hw/ip/prim_generic/prim_generic_flop_2sync.core
@@ -0,0 +1,40 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: "lowrisc:prim_generic:flop_2sync"
+description: "Generic synchronizer cell"
+filesets:
+  files_rtl:
+    files:
+      - rtl/prim_generic_flop_2sync.sv
+    file_type: systemVerilogSource
+
+  files_verilator_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+    files:
+    file_type: vlt
+
+  files_ascentlint_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+    files:
+    file_type: waiver
+
+  files_veriblelint_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+      - lowrisc:lint:comportable
+
+targets:
+  default:
+    filesets:
+      - tool_verilator   ? (files_verilator_waiver)
+      - tool_ascentlint  ? (files_ascentlint_waiver)
+      - tool_veriblelint ? (files_veriblelint_waiver)
+      - files_rtl
diff --git a/hw/ip/prim_generic/rtl/prim_generic_clock_buf.sv b/hw/ip/prim_generic/rtl/prim_generic_clock_buf.sv
new file mode 100644
index 0000000..dd5adf0
--- /dev/null
+++ b/hw/ip/prim_generic/rtl/prim_generic_clock_buf.sv
@@ -0,0 +1,14 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+`include "prim_assert.sv"
+
+module prim_generic_clock_buf (
+  input clk_i,
+  output logic clk_o
+);
+
+  assign clk_o = clk_i;
+
+endmodule // prim_generic_clock_buf
diff --git a/hw/ip/prim_generic/rtl/prim_generic_flop.sv b/hw/ip/prim_generic/rtl/prim_generic_flop.sv
new file mode 100644
index 0000000..0e620e9
--- /dev/null
+++ b/hw/ip/prim_generic/rtl/prim_generic_flop.sv
@@ -0,0 +1,26 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+`include "prim_assert.sv"
+
+module prim_generic_flop # (
+  parameter int Width      = 1,
+  localparam int WidthSubOne = Width-1,
+  parameter logic [WidthSubOne:0] ResetValue = 0
+) (
+  input clk_i,
+  input rst_ni,
+  input [Width-1:0] d_i,
+  output logic [Width-1:0] q_o
+);
+
+  always_ff @(posedge clk_i or negedge rst_ni) begin
+    if (!rst_ni) begin
+      q_o <= ResetValue;
+    end else begin
+      q_o <= d_i;
+    end
+  end
+
+endmodule // prim_generic_flop
diff --git a/hw/ip/prim_generic/rtl/prim_generic_flop_2sync.sv b/hw/ip/prim_generic/rtl/prim_generic_flop_2sync.sv
new file mode 100644
index 0000000..e7ed9b8
--- /dev/null
+++ b/hw/ip/prim_generic/rtl/prim_generic_flop_2sync.sv
@@ -0,0 +1,43 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// Generic double-synchronizer flop
+// This may need to be moved to prim_generic if libraries have a specific cell
+// for synchronization
+
+module prim_generic_flop_2sync #(
+  parameter int Width       = 16,
+  localparam int WidthSubOne = Width-1, // temp work around #2679
+  parameter logic [WidthSubOne:0] ResetValue = '0
+) (
+  input                    clk_i,       // receive clock
+  input                    rst_ni,
+  input        [Width-1:0] d,
+  output logic [Width-1:0] q
+);
+
+  logic [Width-1:0] intq;
+
+  prim_flop #(
+    .Width(Width),
+    .ResetValue(ResetValue)
+  ) u_sync_1 (
+    .clk_i,
+    .rst_ni,
+    .d_i(d),
+    .q_o(intq)
+  );
+
+  prim_flop #(
+    .Width(Width),
+    .ResetValue(ResetValue)
+  ) u_sync_2 (
+    .clk_i,
+    .rst_ni,
+    .d_i(intq),
+    .q_o(q)
+  );
+
+
+endmodule