[dv/xbar] auto-generate toggle coverage in cover.cfg
As auto generating exclusion in el file without proper checksum value,
exclusion may not be recognized correctly by VCS. Move toggle coverage
exclusion automation to cover.cfg, which is more reliable.
Signed-off-by: Weicai Yang <weicai@google.com>
diff --git a/hw/ip/tlul/generic_dv/env/seq_lib/xbar_base_vseq.sv b/hw/ip/tlul/generic_dv/env/seq_lib/xbar_base_vseq.sv
index c722221..ac7a06e 100644
--- a/hw/ip/tlul/generic_dv/env/seq_lib/xbar_base_vseq.sv
+++ b/hw/ip/tlul/generic_dv/env/seq_lib/xbar_base_vseq.sv
@@ -62,7 +62,7 @@
foreach (device_seq[i]) begin
device_seq[i] = tl_device_seq::type_id::create(
$sformatf("%0s_seq", xbar_devices[i].device_name));
- device_seq[i].d_error_pct = $urandom_range(0, 10);
+ device_seq[i].d_error_pct = $urandom_range(0, 70);
end
endfunction : pre_randomize
diff --git a/hw/ip/tlul/generic_dv/xbar_sim_cfg.hjson b/hw/ip/tlul/generic_dv/xbar_sim_cfg.hjson
index 21724a9..eecdf1b 100644
--- a/hw/ip/tlul/generic_dv/xbar_sim_cfg.hjson
+++ b/hw/ip/tlul/generic_dv/xbar_sim_cfg.hjson
@@ -17,12 +17,15 @@
// Fusesoc core file used for building the file list.
fusesoc_core: "lowrisc:dv:{dut}_sim:0.1"
- // Testplan hjson file.
- testplan: "{proj_root}/hw/top_earlgrey/ip/{dut}/data/autogen/{dut}_testplan.hjson"
-
// Set the path to testplan md file as it's not in the default location.
testplan_doc_path: "hw/ip/tlul/doc/dv/#testplan"
+ // Bypass VCS CHECK_SUM check as the exclusion file is generated without proper CHECK_SUM value
+ vcs_cov_analyze_opts: ["-excl_bypass_checks"]
+ vcs_cov_report_opts: ["-excl_bypass_checks"]
+ cov_analyze_opts: ["{{tool}_cov_analyze_opts}"]
+ cov_report_opts: ["{{tool}_cov_report_opts}"]
+
// Import additional common sim cfg files.
import_cfgs: [// Project wide common sim cfg file
"{proj_root}/hw/dv/tools/dvsim/common_sim_cfg.hjson",
@@ -31,13 +34,6 @@
// Add additional tops for simulation.
sim_tops: ["{dut}_bind"]
- // Add excl files to tool_srcs so that it gets copied over to the scratch area.
- tool_srcs: ["{proj_root}/hw/top_earlgrey/ip/{dut}/dv/autogen/xbar_cov_excl.el"]
-
- // Bypass VCS CHECK_SUM check as the exclusion file is generated without proper CHECK_SUM value
- cov_analyze_opts: ["-excl_bypass_checks"]
- cov_report_opts: ["-excl_bypass_checks"]
-
// Default iterations for all tests - each test entry can override this.
reseed: 50
}
diff --git a/hw/top_earlgrey/dv/chip_sim_cfg.hjson b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
index b0e152f..502828d 100644
--- a/hw/top_earlgrey/dv/chip_sim_cfg.hjson
+++ b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
@@ -128,7 +128,7 @@
{
name: xbar_mode
run_opts: ["+xbar_mode=1"]
- reseed: 50
+ reseed: 100
}
]
diff --git a/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_cov_excl.el b/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_cov_excl.el
index e08ba58..d05e792 100644
--- a/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_cov_excl.el
+++ b/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_cov_excl.el
@@ -4,7 +4,16 @@
//
// xbar_cov_excl.el generated by `tlgen.py` tool
-ANNOTATION: "[UNSUPPORTED]"
+ANNOTATION: "[NON_RTL]"
+MODULE: uvm_pkg
+Assert \uvm_reg_map::do_write .unnamed$$_0.unnamed$$_1 "assertion"
+Assert \uvm_reg_map::do_read .unnamed$$_0.unnamed$$_1 "assertion"
+
+ANNOTATION: "[UNSUPPORTED] scan mode isn't available in RTL sim"
+MODULE: xbar_main
+Block 1 "0" "assign unused_scanmode = scanmode_i;"
+
+ANNOTATION: "[UNR]"
MODULE: prim_fifo_sync
Branch 2 "2323268504" "(!rst_ni)" (1) "(!rst_ni) 0,1,-,-"
Branch 3 "3736627057" "(!rst_ni)" (1) "(!rst_ni) 0,1,-,-"
@@ -12,483 +21,8 @@
ANNOTATION: "[UNR]"
MODULE: prim_arbiter_ppc ( parameter N=2,DW=102,EnDataPort=1,EnReqStabA=0 )
Condition 2 "175047464" "(valid_o && ((!ready_i))) 1 -1" (2 "10")
+
ANNOTATION: "[UNR]"
MODULE: prim_arbiter_ppc ( parameter N=3,DW=102,EnDataPort=1,EnReqStabA=0 )
Condition 2 "175047464" "(valid_o && ((!ready_i))) 1 -1" (2 "10")
-ANNOTATION: "[NON_RTL]"
-MODULE: uvm_pkg
-Assert \uvm_reg_map::do_write .unnamed$$_0.unnamed$$_1 "assertion"
-Assert \uvm_reg_map::do_read .unnamed$$_0.unnamed$$_1 "assertion"
-INSTANCE: tb.dut
-ANNOTATION: "[UNSUPPORTED]"
-Block 1 "0" "assign unused_scanmode = scanmode_i;"
-
-ANNOTATION: "[UNSUPPORTED]"
-Toggle scanmode_i
-
-ANNOTATION: "[UNR] these device address bits are always 0"
-Toggle tl_rom_o.a_address [14]
-Toggle tl_rom_o.a_address [16]
-Toggle tl_rom_o.a_address [17]
-Toggle tl_rom_o.a_address [18]
-Toggle tl_rom_o.a_address [19]
-Toggle tl_rom_o.a_address [20]
-Toggle tl_rom_o.a_address [21]
-Toggle tl_rom_o.a_address [22]
-Toggle tl_rom_o.a_address [23]
-Toggle tl_rom_o.a_address [24]
-Toggle tl_rom_o.a_address [25]
-Toggle tl_rom_o.a_address [26]
-Toggle tl_rom_o.a_address [27]
-Toggle tl_rom_o.a_address [28]
-Toggle tl_rom_o.a_address [29]
-Toggle tl_rom_o.a_address [30]
-Toggle tl_rom_o.a_address [31]
-Toggle tl_debug_mem_o.a_address [12]
-Toggle tl_debug_mem_o.a_address [13]
-Toggle tl_debug_mem_o.a_address [14]
-Toggle tl_debug_mem_o.a_address [15]
-Toggle tl_debug_mem_o.a_address [17]
-Toggle tl_debug_mem_o.a_address [18]
-Toggle tl_debug_mem_o.a_address [19]
-Toggle tl_debug_mem_o.a_address [21]
-Toggle tl_debug_mem_o.a_address [22]
-Toggle tl_debug_mem_o.a_address [23]
-Toggle tl_debug_mem_o.a_address [24]
-Toggle tl_debug_mem_o.a_address [26]
-Toggle tl_debug_mem_o.a_address [29]
-Toggle tl_debug_mem_o.a_address [30]
-Toggle tl_debug_mem_o.a_address [31]
-Toggle tl_ram_main_o.a_address [16]
-Toggle tl_ram_main_o.a_address [17]
-Toggle tl_ram_main_o.a_address [18]
-Toggle tl_ram_main_o.a_address [19]
-Toggle tl_ram_main_o.a_address [20]
-Toggle tl_ram_main_o.a_address [21]
-Toggle tl_ram_main_o.a_address [22]
-Toggle tl_ram_main_o.a_address [23]
-Toggle tl_ram_main_o.a_address [24]
-Toggle tl_ram_main_o.a_address [25]
-Toggle tl_ram_main_o.a_address [26]
-Toggle tl_ram_main_o.a_address [27]
-Toggle tl_ram_main_o.a_address [29]
-Toggle tl_ram_main_o.a_address [30]
-Toggle tl_ram_main_o.a_address [31]
-Toggle tl_eflash_o.a_address [19]
-Toggle tl_eflash_o.a_address [20]
-Toggle tl_eflash_o.a_address [21]
-Toggle tl_eflash_o.a_address [22]
-Toggle tl_eflash_o.a_address [23]
-Toggle tl_eflash_o.a_address [24]
-Toggle tl_eflash_o.a_address [25]
-Toggle tl_eflash_o.a_address [26]
-Toggle tl_eflash_o.a_address [27]
-Toggle tl_eflash_o.a_address [28]
-Toggle tl_eflash_o.a_address [30]
-Toggle tl_eflash_o.a_address [31]
-Toggle tl_peri_o.a_address [14]
-Toggle tl_peri_o.a_address [15]
-Toggle tl_peri_o.a_address [18]
-Toggle tl_peri_o.a_address [21]
-Toggle tl_peri_o.a_address [22]
-Toggle tl_peri_o.a_address [23]
-Toggle tl_peri_o.a_address [24]
-Toggle tl_peri_o.a_address [25]
-Toggle tl_peri_o.a_address [26]
-Toggle tl_peri_o.a_address [29]
-Toggle tl_peri_o.a_address [30]
-Toggle tl_peri_o.a_address [31]
-Toggle tl_flash_ctrl_o.a_address [12]
-Toggle tl_flash_ctrl_o.a_address [13]
-Toggle tl_flash_ctrl_o.a_address [14]
-Toggle tl_flash_ctrl_o.a_address [15]
-Toggle tl_flash_ctrl_o.a_address [18]
-Toggle tl_flash_ctrl_o.a_address [19]
-Toggle tl_flash_ctrl_o.a_address [20]
-Toggle tl_flash_ctrl_o.a_address [21]
-Toggle tl_flash_ctrl_o.a_address [22]
-Toggle tl_flash_ctrl_o.a_address [23]
-Toggle tl_flash_ctrl_o.a_address [24]
-Toggle tl_flash_ctrl_o.a_address [25]
-Toggle tl_flash_ctrl_o.a_address [26]
-Toggle tl_flash_ctrl_o.a_address [27]
-Toggle tl_flash_ctrl_o.a_address [28]
-Toggle tl_flash_ctrl_o.a_address [29]
-Toggle tl_flash_ctrl_o.a_address [31]
-Toggle tl_hmac_o.a_address [12]
-Toggle tl_hmac_o.a_address [13]
-Toggle tl_hmac_o.a_address [14]
-Toggle tl_hmac_o.a_address [15]
-Toggle tl_hmac_o.a_address [16]
-Toggle tl_hmac_o.a_address [18]
-Toggle tl_hmac_o.a_address [19]
-Toggle tl_hmac_o.a_address [21]
-Toggle tl_hmac_o.a_address [22]
-Toggle tl_hmac_o.a_address [23]
-Toggle tl_hmac_o.a_address [24]
-Toggle tl_hmac_o.a_address [25]
-Toggle tl_hmac_o.a_address [26]
-Toggle tl_hmac_o.a_address [27]
-Toggle tl_hmac_o.a_address [28]
-Toggle tl_hmac_o.a_address [29]
-Toggle tl_hmac_o.a_address [31]
-Toggle tl_aes_o.a_address [12]
-Toggle tl_aes_o.a_address [13]
-Toggle tl_aes_o.a_address [14]
-Toggle tl_aes_o.a_address [15]
-Toggle tl_aes_o.a_address [17]
-Toggle tl_aes_o.a_address [18]
-Toggle tl_aes_o.a_address [19]
-Toggle tl_aes_o.a_address [21]
-Toggle tl_aes_o.a_address [22]
-Toggle tl_aes_o.a_address [23]
-Toggle tl_aes_o.a_address [24]
-Toggle tl_aes_o.a_address [25]
-Toggle tl_aes_o.a_address [26]
-Toggle tl_aes_o.a_address [27]
-Toggle tl_aes_o.a_address [28]
-Toggle tl_aes_o.a_address [29]
-Toggle tl_aes_o.a_address [31]
-Toggle tl_rv_plic_o.a_address [12]
-Toggle tl_rv_plic_o.a_address [13]
-Toggle tl_rv_plic_o.a_address [14]
-Toggle tl_rv_plic_o.a_address [15]
-Toggle tl_rv_plic_o.a_address [17]
-Toggle tl_rv_plic_o.a_address [18]
-Toggle tl_rv_plic_o.a_address [20]
-Toggle tl_rv_plic_o.a_address [21]
-Toggle tl_rv_plic_o.a_address [22]
-Toggle tl_rv_plic_o.a_address [23]
-Toggle tl_rv_plic_o.a_address [24]
-Toggle tl_rv_plic_o.a_address [25]
-Toggle tl_rv_plic_o.a_address [26]
-Toggle tl_rv_plic_o.a_address [27]
-Toggle tl_rv_plic_o.a_address [28]
-Toggle tl_rv_plic_o.a_address [29]
-Toggle tl_rv_plic_o.a_address [31]
-Toggle tl_pinmux_o.a_address [12]
-Toggle tl_pinmux_o.a_address [13]
-Toggle tl_pinmux_o.a_address [14]
-Toggle tl_pinmux_o.a_address [15]
-Toggle tl_pinmux_o.a_address [19]
-Toggle tl_pinmux_o.a_address [20]
-Toggle tl_pinmux_o.a_address [21]
-Toggle tl_pinmux_o.a_address [22]
-Toggle tl_pinmux_o.a_address [23]
-Toggle tl_pinmux_o.a_address [24]
-Toggle tl_pinmux_o.a_address [25]
-Toggle tl_pinmux_o.a_address [26]
-Toggle tl_pinmux_o.a_address [27]
-Toggle tl_pinmux_o.a_address [28]
-Toggle tl_pinmux_o.a_address [29]
-Toggle tl_pinmux_o.a_address [31]
-Toggle tl_padctrl_o.a_address [12]
-Toggle tl_padctrl_o.a_address [13]
-Toggle tl_padctrl_o.a_address [14]
-Toggle tl_padctrl_o.a_address [15]
-Toggle tl_padctrl_o.a_address [16]
-Toggle tl_padctrl_o.a_address [19]
-Toggle tl_padctrl_o.a_address [21]
-Toggle tl_padctrl_o.a_address [22]
-Toggle tl_padctrl_o.a_address [23]
-Toggle tl_padctrl_o.a_address [24]
-Toggle tl_padctrl_o.a_address [25]
-Toggle tl_padctrl_o.a_address [26]
-Toggle tl_padctrl_o.a_address [27]
-Toggle tl_padctrl_o.a_address [28]
-Toggle tl_padctrl_o.a_address [29]
-Toggle tl_padctrl_o.a_address [31]
-Toggle tl_alert_handler_o.a_address [12]
-Toggle tl_alert_handler_o.a_address [13]
-Toggle tl_alert_handler_o.a_address [14]
-Toggle tl_alert_handler_o.a_address [15]
-Toggle tl_alert_handler_o.a_address [18]
-Toggle tl_alert_handler_o.a_address [19]
-Toggle tl_alert_handler_o.a_address [21]
-Toggle tl_alert_handler_o.a_address [22]
-Toggle tl_alert_handler_o.a_address [23]
-Toggle tl_alert_handler_o.a_address [24]
-Toggle tl_alert_handler_o.a_address [25]
-Toggle tl_alert_handler_o.a_address [26]
-Toggle tl_alert_handler_o.a_address [27]
-Toggle tl_alert_handler_o.a_address [28]
-Toggle tl_alert_handler_o.a_address [29]
-Toggle tl_alert_handler_o.a_address [31]
-Toggle tl_nmi_gen_o.a_address [12]
-Toggle tl_nmi_gen_o.a_address [13]
-Toggle tl_nmi_gen_o.a_address [14]
-Toggle tl_nmi_gen_o.a_address [15]
-Toggle tl_nmi_gen_o.a_address [16]
-Toggle tl_nmi_gen_o.a_address [17]
-Toggle tl_nmi_gen_o.a_address [19]
-Toggle tl_nmi_gen_o.a_address [21]
-Toggle tl_nmi_gen_o.a_address [22]
-Toggle tl_nmi_gen_o.a_address [23]
-Toggle tl_nmi_gen_o.a_address [24]
-Toggle tl_nmi_gen_o.a_address [25]
-Toggle tl_nmi_gen_o.a_address [26]
-Toggle tl_nmi_gen_o.a_address [27]
-Toggle tl_nmi_gen_o.a_address [28]
-Toggle tl_nmi_gen_o.a_address [29]
-Toggle tl_nmi_gen_o.a_address [31]
-Toggle tl_otbn_o.a_address [22]
-Toggle tl_otbn_o.a_address [23]
-Toggle tl_otbn_o.a_address [24]
-Toggle tl_otbn_o.a_address [25]
-Toggle tl_otbn_o.a_address [26]
-Toggle tl_otbn_o.a_address [27]
-Toggle tl_otbn_o.a_address [29]
-Toggle tl_otbn_o.a_address [31]
-Toggle tl_keymgr_o.a_address [12]
-Toggle tl_keymgr_o.a_address [13]
-Toggle tl_keymgr_o.a_address [14]
-Toggle tl_keymgr_o.a_address [15]
-Toggle tl_keymgr_o.a_address [16]
-Toggle tl_keymgr_o.a_address [18]
-Toggle tl_keymgr_o.a_address [21]
-Toggle tl_keymgr_o.a_address [22]
-Toggle tl_keymgr_o.a_address [23]
-Toggle tl_keymgr_o.a_address [24]
-Toggle tl_keymgr_o.a_address [25]
-Toggle tl_keymgr_o.a_address [26]
-Toggle tl_keymgr_o.a_address [27]
-Toggle tl_keymgr_o.a_address [28]
-Toggle tl_keymgr_o.a_address [29]
-Toggle tl_keymgr_o.a_address [31]
-
-Toggle tl_corei_i.a_source [7]
-Toggle tl_corei_o.d_source [7]
-Toggle tl_cored_i.a_source [7]
-Toggle tl_cored_o.d_source [7]
-Toggle tl_dm_sba_i.a_source [7]
-Toggle tl_dm_sba_o.d_source [7]
-Toggle tl_rom_o.a_source [7]
-Toggle tl_rom_i.d_source [7]
-Toggle tl_debug_mem_o.a_source [7]
-Toggle tl_debug_mem_i.d_source [7]
-Toggle tl_ram_main_o.a_source [7]
-Toggle tl_ram_main_i.d_source [7]
-Toggle tl_eflash_o.a_source [7]
-Toggle tl_eflash_i.d_source [7]
-Toggle tl_peri_o.a_source [7]
-Toggle tl_peri_i.d_source [7]
-Toggle tl_flash_ctrl_o.a_source [7]
-Toggle tl_flash_ctrl_i.d_source [7]
-Toggle tl_hmac_o.a_source [7]
-Toggle tl_hmac_i.d_source [7]
-Toggle tl_aes_o.a_source [7]
-Toggle tl_aes_i.d_source [7]
-Toggle tl_rv_plic_o.a_source [7]
-Toggle tl_rv_plic_i.d_source [7]
-Toggle tl_pinmux_o.a_source [7]
-Toggle tl_pinmux_i.d_source [7]
-Toggle tl_padctrl_o.a_source [7]
-Toggle tl_padctrl_i.d_source [7]
-Toggle tl_alert_handler_o.a_source [7]
-Toggle tl_alert_handler_i.d_source [7]
-Toggle tl_nmi_gen_o.a_source [7]
-Toggle tl_nmi_gen_i.d_source [7]
-Toggle tl_otbn_o.a_source [7]
-Toggle tl_otbn_i.d_source [7]
-Toggle tl_keymgr_o.a_source [7]
-Toggle tl_keymgr_i.d_source [7]
-Toggle tl_corei_i.a_source [6]
-Toggle tl_corei_o.d_source [6]
-Toggle tl_cored_i.a_source [6]
-Toggle tl_cored_o.d_source [6]
-Toggle tl_dm_sba_i.a_source [6]
-Toggle tl_dm_sba_o.d_source [6]
-Toggle tl_rom_o.a_source [6]
-Toggle tl_rom_i.d_source [6]
-Toggle tl_debug_mem_o.a_source [6]
-Toggle tl_debug_mem_i.d_source [6]
-Toggle tl_ram_main_o.a_source [6]
-Toggle tl_ram_main_i.d_source [6]
-Toggle tl_eflash_o.a_source [6]
-Toggle tl_eflash_i.d_source [6]
-Toggle tl_peri_o.a_source [6]
-Toggle tl_peri_i.d_source [6]
-Toggle tl_flash_ctrl_o.a_source [6]
-Toggle tl_flash_ctrl_i.d_source [6]
-Toggle tl_hmac_o.a_source [6]
-Toggle tl_hmac_i.d_source [6]
-Toggle tl_aes_o.a_source [6]
-Toggle tl_aes_i.d_source [6]
-Toggle tl_rv_plic_o.a_source [6]
-Toggle tl_rv_plic_i.d_source [6]
-Toggle tl_pinmux_o.a_source [6]
-Toggle tl_pinmux_i.d_source [6]
-Toggle tl_padctrl_o.a_source [6]
-Toggle tl_padctrl_i.d_source [6]
-Toggle tl_alert_handler_o.a_source [6]
-Toggle tl_alert_handler_i.d_source [6]
-Toggle tl_nmi_gen_o.a_source [6]
-Toggle tl_nmi_gen_i.d_source [6]
-Toggle tl_otbn_o.a_source [6]
-Toggle tl_otbn_i.d_source [6]
-Toggle tl_keymgr_o.a_source [6]
-Toggle tl_keymgr_i.d_source [6]
-
-Toggle tl_corei_i.a_param
-Toggle tl_corei_o.d_param
-
-Toggle tl_corei_o.d_user
-Toggle tl_corei_i.a_user.rsvd1
-Toggle tl_corei_i.a_user.parity
-Toggle tl_corei_i.a_user.parity_en
-
-Toggle tl_corei_o.d_opcode [2:1]
-Toggle tl_cored_i.a_param
-Toggle tl_cored_o.d_param
-
-Toggle tl_cored_o.d_user
-Toggle tl_cored_i.a_user.rsvd1
-Toggle tl_cored_i.a_user.parity
-Toggle tl_cored_i.a_user.parity_en
-
-Toggle tl_cored_o.d_opcode [2:1]
-Toggle tl_dm_sba_i.a_param
-Toggle tl_dm_sba_o.d_param
-
-Toggle tl_dm_sba_o.d_user
-Toggle tl_dm_sba_i.a_user.rsvd1
-Toggle tl_dm_sba_i.a_user.parity
-Toggle tl_dm_sba_i.a_user.parity_en
-
-Toggle tl_dm_sba_o.d_opcode [2:1]
-Toggle tl_rom_o.a_param
-Toggle tl_rom_i.d_param
-
-Toggle tl_rom_i.d_user
-Toggle tl_rom_o.a_user.rsvd1
-Toggle tl_rom_o.a_user.parity
-Toggle tl_rom_o.a_user.parity_en
-
-Toggle tl_rom_i.d_opcode [2:1]
-Toggle tl_debug_mem_o.a_param
-Toggle tl_debug_mem_i.d_param
-
-Toggle tl_debug_mem_i.d_user
-Toggle tl_debug_mem_o.a_user.rsvd1
-Toggle tl_debug_mem_o.a_user.parity
-Toggle tl_debug_mem_o.a_user.parity_en
-
-Toggle tl_debug_mem_i.d_opcode [2:1]
-Toggle tl_ram_main_o.a_param
-Toggle tl_ram_main_i.d_param
-
-Toggle tl_ram_main_i.d_user
-Toggle tl_ram_main_o.a_user.rsvd1
-Toggle tl_ram_main_o.a_user.parity
-Toggle tl_ram_main_o.a_user.parity_en
-
-Toggle tl_ram_main_i.d_opcode [2:1]
-Toggle tl_eflash_o.a_param
-Toggle tl_eflash_i.d_param
-
-Toggle tl_eflash_i.d_user
-Toggle tl_eflash_o.a_user.rsvd1
-Toggle tl_eflash_o.a_user.parity
-Toggle tl_eflash_o.a_user.parity_en
-
-Toggle tl_eflash_i.d_opcode [2:1]
-Toggle tl_peri_o.a_param
-Toggle tl_peri_i.d_param
-
-Toggle tl_peri_i.d_user
-Toggle tl_peri_o.a_user.rsvd1
-Toggle tl_peri_o.a_user.parity
-Toggle tl_peri_o.a_user.parity_en
-
-Toggle tl_peri_i.d_opcode [2:1]
-Toggle tl_flash_ctrl_o.a_param
-Toggle tl_flash_ctrl_i.d_param
-
-Toggle tl_flash_ctrl_i.d_user
-Toggle tl_flash_ctrl_o.a_user.rsvd1
-Toggle tl_flash_ctrl_o.a_user.parity
-Toggle tl_flash_ctrl_o.a_user.parity_en
-
-Toggle tl_flash_ctrl_i.d_opcode [2:1]
-Toggle tl_hmac_o.a_param
-Toggle tl_hmac_i.d_param
-
-Toggle tl_hmac_i.d_user
-Toggle tl_hmac_o.a_user.rsvd1
-Toggle tl_hmac_o.a_user.parity
-Toggle tl_hmac_o.a_user.parity_en
-
-Toggle tl_hmac_i.d_opcode [2:1]
-Toggle tl_aes_o.a_param
-Toggle tl_aes_i.d_param
-
-Toggle tl_aes_i.d_user
-Toggle tl_aes_o.a_user.rsvd1
-Toggle tl_aes_o.a_user.parity
-Toggle tl_aes_o.a_user.parity_en
-
-Toggle tl_aes_i.d_opcode [2:1]
-Toggle tl_rv_plic_o.a_param
-Toggle tl_rv_plic_i.d_param
-
-Toggle tl_rv_plic_i.d_user
-Toggle tl_rv_plic_o.a_user.rsvd1
-Toggle tl_rv_plic_o.a_user.parity
-Toggle tl_rv_plic_o.a_user.parity_en
-
-Toggle tl_rv_plic_i.d_opcode [2:1]
-Toggle tl_pinmux_o.a_param
-Toggle tl_pinmux_i.d_param
-
-Toggle tl_pinmux_i.d_user
-Toggle tl_pinmux_o.a_user.rsvd1
-Toggle tl_pinmux_o.a_user.parity
-Toggle tl_pinmux_o.a_user.parity_en
-
-Toggle tl_pinmux_i.d_opcode [2:1]
-Toggle tl_padctrl_o.a_param
-Toggle tl_padctrl_i.d_param
-
-Toggle tl_padctrl_i.d_user
-Toggle tl_padctrl_o.a_user.rsvd1
-Toggle tl_padctrl_o.a_user.parity
-Toggle tl_padctrl_o.a_user.parity_en
-
-Toggle tl_padctrl_i.d_opcode [2:1]
-Toggle tl_alert_handler_o.a_param
-Toggle tl_alert_handler_i.d_param
-
-Toggle tl_alert_handler_i.d_user
-Toggle tl_alert_handler_o.a_user.rsvd1
-Toggle tl_alert_handler_o.a_user.parity
-Toggle tl_alert_handler_o.a_user.parity_en
-
-Toggle tl_alert_handler_i.d_opcode [2:1]
-Toggle tl_nmi_gen_o.a_param
-Toggle tl_nmi_gen_i.d_param
-
-Toggle tl_nmi_gen_i.d_user
-Toggle tl_nmi_gen_o.a_user.rsvd1
-Toggle tl_nmi_gen_o.a_user.parity
-Toggle tl_nmi_gen_o.a_user.parity_en
-
-Toggle tl_nmi_gen_i.d_opcode [2:1]
-Toggle tl_otbn_o.a_param
-Toggle tl_otbn_i.d_param
-
-Toggle tl_otbn_i.d_user
-Toggle tl_otbn_o.a_user.rsvd1
-Toggle tl_otbn_o.a_user.parity
-Toggle tl_otbn_o.a_user.parity_en
-
-Toggle tl_otbn_i.d_opcode [2:1]
-Toggle tl_keymgr_o.a_param
-Toggle tl_keymgr_i.d_param
-
-Toggle tl_keymgr_i.d_user
-Toggle tl_keymgr_o.a_user.rsvd1
-Toggle tl_keymgr_o.a_user.parity
-Toggle tl_keymgr_o.a_user.parity_en
-
-Toggle tl_keymgr_i.d_opcode [2:1]
diff --git a/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_cover.cfg b/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_cover.cfg
new file mode 100644
index 0000000..2cdcc0f
--- /dev/null
+++ b/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_cover.cfg
@@ -0,0 +1,104 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// xbar_cover.cfg generated by `tlgen.py` tool
+
++tree tb.dut
+-module pins_if // DV construct.
+-module clk_rst_if // DV construct.
+
+// due to VCS issue (fixed at VCS/2020.12), can't move this part into begin...end (tgl) or after.
+-node tb.dut tl_*.a_param
+-node tb.dut tl_*.d_param
+-node tb.dut tl_*.d_user
+-node tb.dut tl_*.a_user.*
+-node tb.dut tl_*.d_opcode[2:1]
+
+// [UNR] these device address bits are always 0
+-node tb.dut tl_rom_o.a_address[14:14]
+-node tb.dut tl_rom_o.a_address[31:16]
+-node tb.dut tl_debug_mem_o.a_address[15:12]
+-node tb.dut tl_debug_mem_o.a_address[19:17]
+-node tb.dut tl_debug_mem_o.a_address[24:21]
+-node tb.dut tl_debug_mem_o.a_address[26:26]
+-node tb.dut tl_debug_mem_o.a_address[31:29]
+-node tb.dut tl_ram_main_o.a_address[27:16]
+-node tb.dut tl_ram_main_o.a_address[31:29]
+-node tb.dut tl_eflash_o.a_address[28:19]
+-node tb.dut tl_eflash_o.a_address[31:30]
+-node tb.dut tl_peri_o.a_address[19:18]
+-node tb.dut tl_peri_o.a_address[21:21]
+-node tb.dut tl_peri_o.a_address[26:23]
+-node tb.dut tl_peri_o.a_address[31:29]
+-node tb.dut tl_flash_ctrl_o.a_address[23:12]
+-node tb.dut tl_flash_ctrl_o.a_address[29:25]
+-node tb.dut tl_flash_ctrl_o.a_address[31:31]
+-node tb.dut tl_hmac_o.a_address[15:12]
+-node tb.dut tl_hmac_o.a_address[19:17]
+-node tb.dut tl_hmac_o.a_address[23:21]
+-node tb.dut tl_hmac_o.a_address[29:25]
+-node tb.dut tl_hmac_o.a_address[31:31]
+-node tb.dut tl_kmac_o.a_address[16:12]
+-node tb.dut tl_kmac_o.a_address[19:18]
+-node tb.dut tl_kmac_o.a_address[23:21]
+-node tb.dut tl_kmac_o.a_address[29:25]
+-node tb.dut tl_kmac_o.a_address[31:31]
+-node tb.dut tl_aes_o.a_address[19:12]
+-node tb.dut tl_aes_o.a_address[23:21]
+-node tb.dut tl_aes_o.a_address[29:25]
+-node tb.dut tl_aes_o.a_address[31:31]
+-node tb.dut tl_entropy_src_o.a_address[16:12]
+-node tb.dut tl_entropy_src_o.a_address[19:19]
+-node tb.dut tl_entropy_src_o.a_address[23:21]
+-node tb.dut tl_entropy_src_o.a_address[29:25]
+-node tb.dut tl_entropy_src_o.a_address[31:31]
+-node tb.dut tl_csrng_o.a_address[15:12]
+-node tb.dut tl_csrng_o.a_address[17:17]
+-node tb.dut tl_csrng_o.a_address[19:19]
+-node tb.dut tl_csrng_o.a_address[23:21]
+-node tb.dut tl_csrng_o.a_address[29:25]
+-node tb.dut tl_csrng_o.a_address[31:31]
+-node tb.dut tl_edn0_o.a_address[15:12]
+-node tb.dut tl_edn0_o.a_address[19:19]
+-node tb.dut tl_edn0_o.a_address[23:21]
+-node tb.dut tl_edn0_o.a_address[29:25]
+-node tb.dut tl_edn0_o.a_address[31:31]
+-node tb.dut tl_edn1_o.a_address[18:12]
+-node tb.dut tl_edn1_o.a_address[23:21]
+-node tb.dut tl_edn1_o.a_address[29:25]
+-node tb.dut tl_edn1_o.a_address[31:31]
+-node tb.dut tl_rv_plic_o.a_address[15:12]
+-node tb.dut tl_rv_plic_o.a_address[23:17]
+-node tb.dut tl_rv_plic_o.a_address[29:25]
+-node tb.dut tl_rv_plic_o.a_address[31:31]
+-node tb.dut tl_pinmux_o.a_address[16:12]
+-node tb.dut tl_pinmux_o.a_address[21:19]
+-node tb.dut tl_pinmux_o.a_address[29:23]
+-node tb.dut tl_pinmux_o.a_address[31:31]
+-node tb.dut tl_padctrl_o.a_address[15:12]
+-node tb.dut tl_padctrl_o.a_address[21:19]
+-node tb.dut tl_padctrl_o.a_address[29:23]
+-node tb.dut tl_padctrl_o.a_address[31:31]
+-node tb.dut tl_otbn_o.a_address[17:17]
+-node tb.dut tl_otbn_o.a_address[23:21]
+-node tb.dut tl_otbn_o.a_address[29:25]
+-node tb.dut tl_otbn_o.a_address[31:31]
+-node tb.dut tl_keymgr_o.a_address[15:12]
+-node tb.dut tl_keymgr_o.a_address[19:18]
+-node tb.dut tl_keymgr_o.a_address[23:21]
+-node tb.dut tl_keymgr_o.a_address[29:25]
+-node tb.dut tl_keymgr_o.a_address[31:31]
+-node tb.dut tl_sram_ctrl_main_o.a_address[17:12]
+-node tb.dut tl_sram_ctrl_main_o.a_address[23:21]
+-node tb.dut tl_sram_ctrl_main_o.a_address[29:25]
+-node tb.dut tl_sram_ctrl_main_o.a_address[31:31]
+
+-node tb.dut tl_*.a_source[7:5]
+-node tb.dut tl_*.d_source[7:5]
+begin tgl
+ -tree tb
+ +tree tb.dut 1
+ -node tb.dut.scanmode_i
+end
+
diff --git a/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_main_sim_cfg.hjson b/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_main_sim_cfg.hjson
index 35b7b85..d9f0da9 100644
--- a/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_main_sim_cfg.hjson
+++ b/hw/top_earlgrey/ip/xbar_main/dv/autogen/xbar_main_sim_cfg.hjson
@@ -13,7 +13,7 @@
testplan: "{proj_root}/hw/top_earlgrey/ip/{dut}/data/autogen/{dut}_testplan.hjson"
// Add xbar_main specific exclusion files.
- vcs_cov_excl_files: ["{proj_root}/hw/top_earlgrey/ip/{dut}/dv/cov/xbar_cov_excl.el"]
+ vcs_cov_excl_files: ["{proj_root}/hw/top_earlgrey/ip/{dut}/dv/autogen/xbar_cov_excl.el"]
// Import additional common sim cfg files.
import_cfgs: [// xbar common sim cfg file
diff --git a/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_cov_excl.el b/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_cov_excl.el
index 67e59f9..f7a31e0 100644
--- a/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_cov_excl.el
+++ b/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_cov_excl.el
@@ -4,342 +4,12 @@
//
// xbar_cov_excl.el generated by `tlgen.py` tool
-ANNOTATION: "[UNSUPPORTED]"
-MODULE: prim_fifo_sync
-Branch 2 "2323268504" "(!rst_ni)" (1) "(!rst_ni) 0,1,-,-"
-Branch 3 "3736627057" "(!rst_ni)" (1) "(!rst_ni) 0,1,-,-"
-
ANNOTATION: "[NON_RTL]"
MODULE: uvm_pkg
Assert \uvm_reg_map::do_write .unnamed$$_0.unnamed$$_1 "assertion"
Assert \uvm_reg_map::do_read .unnamed$$_0.unnamed$$_1 "assertion"
-INSTANCE: tb.dut
-ANNOTATION: "[UNSUPPORTED]"
+ANNOTATION: "[UNSUPPORTED] scan mode isn't available in RTL sim"
+MODULE: xbar_peri
Block 1 "0" "assign unused_scanmode = scanmode_i;"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle scanmode_i
-
-ANNOTATION: "[UNR] these device address bits are always 0"
-Toggle tl_uart_o.a_address [12]
-Toggle tl_uart_o.a_address [13]
-Toggle tl_uart_o.a_address [14]
-Toggle tl_uart_o.a_address [15]
-Toggle tl_uart_o.a_address [16]
-Toggle tl_uart_o.a_address [17]
-Toggle tl_uart_o.a_address [18]
-Toggle tl_uart_o.a_address [19]
-Toggle tl_uart_o.a_address [20]
-Toggle tl_uart_o.a_address [21]
-Toggle tl_uart_o.a_address [22]
-Toggle tl_uart_o.a_address [23]
-Toggle tl_uart_o.a_address [24]
-Toggle tl_uart_o.a_address [25]
-Toggle tl_uart_o.a_address [26]
-Toggle tl_uart_o.a_address [27]
-Toggle tl_uart_o.a_address [28]
-Toggle tl_uart_o.a_address [29]
-Toggle tl_uart_o.a_address [31]
-Toggle tl_gpio_o.a_address [12]
-Toggle tl_gpio_o.a_address [13]
-Toggle tl_gpio_o.a_address [14]
-Toggle tl_gpio_o.a_address [15]
-Toggle tl_gpio_o.a_address [17]
-Toggle tl_gpio_o.a_address [18]
-Toggle tl_gpio_o.a_address [19]
-Toggle tl_gpio_o.a_address [20]
-Toggle tl_gpio_o.a_address [21]
-Toggle tl_gpio_o.a_address [22]
-Toggle tl_gpio_o.a_address [23]
-Toggle tl_gpio_o.a_address [24]
-Toggle tl_gpio_o.a_address [25]
-Toggle tl_gpio_o.a_address [26]
-Toggle tl_gpio_o.a_address [27]
-Toggle tl_gpio_o.a_address [28]
-Toggle tl_gpio_o.a_address [29]
-Toggle tl_gpio_o.a_address [31]
-Toggle tl_spi_device_o.a_address [12]
-Toggle tl_spi_device_o.a_address [13]
-Toggle tl_spi_device_o.a_address [14]
-Toggle tl_spi_device_o.a_address [15]
-Toggle tl_spi_device_o.a_address [16]
-Toggle tl_spi_device_o.a_address [18]
-Toggle tl_spi_device_o.a_address [19]
-Toggle tl_spi_device_o.a_address [20]
-Toggle tl_spi_device_o.a_address [21]
-Toggle tl_spi_device_o.a_address [22]
-Toggle tl_spi_device_o.a_address [23]
-Toggle tl_spi_device_o.a_address [24]
-Toggle tl_spi_device_o.a_address [25]
-Toggle tl_spi_device_o.a_address [26]
-Toggle tl_spi_device_o.a_address [27]
-Toggle tl_spi_device_o.a_address [28]
-Toggle tl_spi_device_o.a_address [29]
-Toggle tl_spi_device_o.a_address [31]
-Toggle tl_rv_timer_o.a_address [12]
-Toggle tl_rv_timer_o.a_address [13]
-Toggle tl_rv_timer_o.a_address [14]
-Toggle tl_rv_timer_o.a_address [15]
-Toggle tl_rv_timer_o.a_address [16]
-Toggle tl_rv_timer_o.a_address [17]
-Toggle tl_rv_timer_o.a_address [18]
-Toggle tl_rv_timer_o.a_address [20]
-Toggle tl_rv_timer_o.a_address [21]
-Toggle tl_rv_timer_o.a_address [22]
-Toggle tl_rv_timer_o.a_address [23]
-Toggle tl_rv_timer_o.a_address [24]
-Toggle tl_rv_timer_o.a_address [25]
-Toggle tl_rv_timer_o.a_address [26]
-Toggle tl_rv_timer_o.a_address [27]
-Toggle tl_rv_timer_o.a_address [28]
-Toggle tl_rv_timer_o.a_address [29]
-Toggle tl_rv_timer_o.a_address [31]
-Toggle tl_usbdev_o.a_address [12]
-Toggle tl_usbdev_o.a_address [13]
-Toggle tl_usbdev_o.a_address [14]
-Toggle tl_usbdev_o.a_address [15]
-Toggle tl_usbdev_o.a_address [17]
-Toggle tl_usbdev_o.a_address [19]
-Toggle tl_usbdev_o.a_address [21]
-Toggle tl_usbdev_o.a_address [22]
-Toggle tl_usbdev_o.a_address [23]
-Toggle tl_usbdev_o.a_address [24]
-Toggle tl_usbdev_o.a_address [25]
-Toggle tl_usbdev_o.a_address [26]
-Toggle tl_usbdev_o.a_address [27]
-Toggle tl_usbdev_o.a_address [28]
-Toggle tl_usbdev_o.a_address [29]
-Toggle tl_usbdev_o.a_address [31]
-Toggle tl_pwrmgr_o.a_address [12]
-Toggle tl_pwrmgr_o.a_address [13]
-Toggle tl_pwrmgr_o.a_address [14]
-Toggle tl_pwrmgr_o.a_address [15]
-Toggle tl_pwrmgr_o.a_address [16]
-Toggle tl_pwrmgr_o.a_address [18]
-Toggle tl_pwrmgr_o.a_address [20]
-Toggle tl_pwrmgr_o.a_address [21]
-Toggle tl_pwrmgr_o.a_address [22]
-Toggle tl_pwrmgr_o.a_address [23]
-Toggle tl_pwrmgr_o.a_address [24]
-Toggle tl_pwrmgr_o.a_address [25]
-Toggle tl_pwrmgr_o.a_address [26]
-Toggle tl_pwrmgr_o.a_address [27]
-Toggle tl_pwrmgr_o.a_address [28]
-Toggle tl_pwrmgr_o.a_address [29]
-Toggle tl_pwrmgr_o.a_address [31]
-Toggle tl_rstmgr_o.a_address [12]
-Toggle tl_rstmgr_o.a_address [13]
-Toggle tl_rstmgr_o.a_address [14]
-Toggle tl_rstmgr_o.a_address [15]
-Toggle tl_rstmgr_o.a_address [18]
-Toggle tl_rstmgr_o.a_address [20]
-Toggle tl_rstmgr_o.a_address [21]
-Toggle tl_rstmgr_o.a_address [22]
-Toggle tl_rstmgr_o.a_address [23]
-Toggle tl_rstmgr_o.a_address [24]
-Toggle tl_rstmgr_o.a_address [25]
-Toggle tl_rstmgr_o.a_address [26]
-Toggle tl_rstmgr_o.a_address [27]
-Toggle tl_rstmgr_o.a_address [28]
-Toggle tl_rstmgr_o.a_address [29]
-Toggle tl_rstmgr_o.a_address [31]
-Toggle tl_clkmgr_o.a_address [12]
-Toggle tl_clkmgr_o.a_address [13]
-Toggle tl_clkmgr_o.a_address [14]
-Toggle tl_clkmgr_o.a_address [15]
-Toggle tl_clkmgr_o.a_address [16]
-Toggle tl_clkmgr_o.a_address [17]
-Toggle tl_clkmgr_o.a_address [20]
-Toggle tl_clkmgr_o.a_address [21]
-Toggle tl_clkmgr_o.a_address [22]
-Toggle tl_clkmgr_o.a_address [23]
-Toggle tl_clkmgr_o.a_address [24]
-Toggle tl_clkmgr_o.a_address [25]
-Toggle tl_clkmgr_o.a_address [26]
-Toggle tl_clkmgr_o.a_address [27]
-Toggle tl_clkmgr_o.a_address [28]
-Toggle tl_clkmgr_o.a_address [29]
-Toggle tl_clkmgr_o.a_address [31]
-Toggle tl_ram_ret_o.a_address [12]
-Toggle tl_ram_ret_o.a_address [13]
-Toggle tl_ram_ret_o.a_address [14]
-Toggle tl_ram_ret_o.a_address [15]
-Toggle tl_ram_ret_o.a_address [16]
-Toggle tl_ram_ret_o.a_address [17]
-Toggle tl_ram_ret_o.a_address [18]
-Toggle tl_ram_ret_o.a_address [19]
-Toggle tl_ram_ret_o.a_address [20]
-Toggle tl_ram_ret_o.a_address [21]
-Toggle tl_ram_ret_o.a_address [22]
-Toggle tl_ram_ret_o.a_address [23]
-Toggle tl_ram_ret_o.a_address [24]
-Toggle tl_ram_ret_o.a_address [25]
-Toggle tl_ram_ret_o.a_address [26]
-Toggle tl_ram_ret_o.a_address [29]
-Toggle tl_ram_ret_o.a_address [30]
-Toggle tl_ram_ret_o.a_address [31]
-Toggle tl_otp_ctrl_o.a_address [14]
-Toggle tl_otp_ctrl_o.a_address [15]
-Toggle tl_otp_ctrl_o.a_address [18]
-Toggle tl_otp_ctrl_o.a_address [21]
-Toggle tl_otp_ctrl_o.a_address [22]
-Toggle tl_otp_ctrl_o.a_address [23]
-Toggle tl_otp_ctrl_o.a_address [24]
-Toggle tl_otp_ctrl_o.a_address [25]
-Toggle tl_otp_ctrl_o.a_address [26]
-Toggle tl_otp_ctrl_o.a_address [27]
-Toggle tl_otp_ctrl_o.a_address [28]
-Toggle tl_otp_ctrl_o.a_address [29]
-Toggle tl_otp_ctrl_o.a_address [31]
-Toggle tl_sensor_ctrl_o.a_address [12]
-Toggle tl_sensor_ctrl_o.a_address [13]
-Toggle tl_sensor_ctrl_o.a_address [14]
-Toggle tl_sensor_ctrl_o.a_address [15]
-Toggle tl_sensor_ctrl_o.a_address [19]
-Toggle tl_sensor_ctrl_o.a_address [21]
-Toggle tl_sensor_ctrl_o.a_address [22]
-Toggle tl_sensor_ctrl_o.a_address [23]
-Toggle tl_sensor_ctrl_o.a_address [24]
-Toggle tl_sensor_ctrl_o.a_address [25]
-Toggle tl_sensor_ctrl_o.a_address [26]
-Toggle tl_sensor_ctrl_o.a_address [27]
-Toggle tl_sensor_ctrl_o.a_address [28]
-Toggle tl_sensor_ctrl_o.a_address [29]
-Toggle tl_sensor_ctrl_o.a_address [31]
-Toggle tl_ast_wrapper_o.a_address [12]
-Toggle tl_ast_wrapper_o.a_address [13]
-Toggle tl_ast_wrapper_o.a_address [14]
-Toggle tl_ast_wrapper_o.a_address [15]
-Toggle tl_ast_wrapper_o.a_address [16]
-Toggle tl_ast_wrapper_o.a_address [17]
-Toggle tl_ast_wrapper_o.a_address [18]
-Toggle tl_ast_wrapper_o.a_address [21]
-Toggle tl_ast_wrapper_o.a_address [22]
-Toggle tl_ast_wrapper_o.a_address [23]
-Toggle tl_ast_wrapper_o.a_address [24]
-Toggle tl_ast_wrapper_o.a_address [25]
-Toggle tl_ast_wrapper_o.a_address [26]
-Toggle tl_ast_wrapper_o.a_address [27]
-Toggle tl_ast_wrapper_o.a_address [28]
-Toggle tl_ast_wrapper_o.a_address [29]
-Toggle tl_ast_wrapper_o.a_address [31]
-
-
-Toggle tl_main_i.a_param
-Toggle tl_main_o.d_param
-
-Toggle tl_main_o.d_user
-Toggle tl_main_i.a_user.rsvd1
-Toggle tl_main_i.a_user.parity
-Toggle tl_main_i.a_user.parity_en
-
-Toggle tl_main_o.d_opcode [2:1]
-Toggle tl_uart_o.a_param
-Toggle tl_uart_i.d_param
-
-Toggle tl_uart_i.d_user
-Toggle tl_uart_o.a_user.rsvd1
-Toggle tl_uart_o.a_user.parity
-Toggle tl_uart_o.a_user.parity_en
-
-Toggle tl_uart_i.d_opcode [2:1]
-Toggle tl_gpio_o.a_param
-Toggle tl_gpio_i.d_param
-
-Toggle tl_gpio_i.d_user
-Toggle tl_gpio_o.a_user.rsvd1
-Toggle tl_gpio_o.a_user.parity
-Toggle tl_gpio_o.a_user.parity_en
-
-Toggle tl_gpio_i.d_opcode [2:1]
-Toggle tl_spi_device_o.a_param
-Toggle tl_spi_device_i.d_param
-
-Toggle tl_spi_device_i.d_user
-Toggle tl_spi_device_o.a_user.rsvd1
-Toggle tl_spi_device_o.a_user.parity
-Toggle tl_spi_device_o.a_user.parity_en
-
-Toggle tl_spi_device_i.d_opcode [2:1]
-Toggle tl_rv_timer_o.a_param
-Toggle tl_rv_timer_i.d_param
-
-Toggle tl_rv_timer_i.d_user
-Toggle tl_rv_timer_o.a_user.rsvd1
-Toggle tl_rv_timer_o.a_user.parity
-Toggle tl_rv_timer_o.a_user.parity_en
-
-Toggle tl_rv_timer_i.d_opcode [2:1]
-Toggle tl_usbdev_o.a_param
-Toggle tl_usbdev_i.d_param
-
-Toggle tl_usbdev_i.d_user
-Toggle tl_usbdev_o.a_user.rsvd1
-Toggle tl_usbdev_o.a_user.parity
-Toggle tl_usbdev_o.a_user.parity_en
-
-Toggle tl_usbdev_i.d_opcode [2:1]
-Toggle tl_pwrmgr_o.a_param
-Toggle tl_pwrmgr_i.d_param
-
-Toggle tl_pwrmgr_i.d_user
-Toggle tl_pwrmgr_o.a_user.rsvd1
-Toggle tl_pwrmgr_o.a_user.parity
-Toggle tl_pwrmgr_o.a_user.parity_en
-
-Toggle tl_pwrmgr_i.d_opcode [2:1]
-Toggle tl_rstmgr_o.a_param
-Toggle tl_rstmgr_i.d_param
-
-Toggle tl_rstmgr_i.d_user
-Toggle tl_rstmgr_o.a_user.rsvd1
-Toggle tl_rstmgr_o.a_user.parity
-Toggle tl_rstmgr_o.a_user.parity_en
-
-Toggle tl_rstmgr_i.d_opcode [2:1]
-Toggle tl_clkmgr_o.a_param
-Toggle tl_clkmgr_i.d_param
-
-Toggle tl_clkmgr_i.d_user
-Toggle tl_clkmgr_o.a_user.rsvd1
-Toggle tl_clkmgr_o.a_user.parity
-Toggle tl_clkmgr_o.a_user.parity_en
-
-Toggle tl_clkmgr_i.d_opcode [2:1]
-Toggle tl_ram_ret_o.a_param
-Toggle tl_ram_ret_i.d_param
-
-Toggle tl_ram_ret_i.d_user
-Toggle tl_ram_ret_o.a_user.rsvd1
-Toggle tl_ram_ret_o.a_user.parity
-Toggle tl_ram_ret_o.a_user.parity_en
-
-Toggle tl_ram_ret_i.d_opcode [2:1]
-Toggle tl_otp_ctrl_o.a_param
-Toggle tl_otp_ctrl_i.d_param
-
-Toggle tl_otp_ctrl_i.d_user
-Toggle tl_otp_ctrl_o.a_user.rsvd1
-Toggle tl_otp_ctrl_o.a_user.parity
-Toggle tl_otp_ctrl_o.a_user.parity_en
-
-Toggle tl_otp_ctrl_i.d_opcode [2:1]
-Toggle tl_sensor_ctrl_o.a_param
-Toggle tl_sensor_ctrl_i.d_param
-
-Toggle tl_sensor_ctrl_i.d_user
-Toggle tl_sensor_ctrl_o.a_user.rsvd1
-Toggle tl_sensor_ctrl_o.a_user.parity
-Toggle tl_sensor_ctrl_o.a_user.parity_en
-
-Toggle tl_sensor_ctrl_i.d_opcode [2:1]
-Toggle tl_ast_wrapper_o.a_param
-Toggle tl_ast_wrapper_i.d_param
-
-Toggle tl_ast_wrapper_i.d_user
-Toggle tl_ast_wrapper_o.a_user.rsvd1
-Toggle tl_ast_wrapper_o.a_user.parity
-Toggle tl_ast_wrapper_o.a_user.parity_en
-
-Toggle tl_ast_wrapper_i.d_opcode [2:1]
diff --git a/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_cover.cfg b/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_cover.cfg
new file mode 100644
index 0000000..d026cf5
--- /dev/null
+++ b/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_cover.cfg
@@ -0,0 +1,83 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// xbar_cover.cfg generated by `tlgen.py` tool
+
++tree tb.dut
+-module pins_if // DV construct.
+-module clk_rst_if // DV construct.
+
+// due to VCS issue (fixed at VCS/2020.12), can't move this part into begin...end (tgl) or after.
+-node tb.dut tl_*.a_param
+-node tb.dut tl_*.d_param
+-node tb.dut tl_*.d_user
+-node tb.dut tl_*.a_user.*
+-node tb.dut tl_*.d_opcode[2:1]
+
+// [UNR] these device address bits are always 0
+-node tb.dut tl_uart_o.a_address[29:12]
+-node tb.dut tl_uart_o.a_address[31:31]
+-node tb.dut tl_gpio_o.a_address[17:12]
+-node tb.dut tl_gpio_o.a_address[29:19]
+-node tb.dut tl_gpio_o.a_address[31:31]
+-node tb.dut tl_spi_device_o.a_address[15:12]
+-node tb.dut tl_spi_device_o.a_address[17:17]
+-node tb.dut tl_spi_device_o.a_address[29:19]
+-node tb.dut tl_spi_device_o.a_address[31:31]
+-node tb.dut tl_rv_timer_o.a_address[19:12]
+-node tb.dut tl_rv_timer_o.a_address[29:21]
+-node tb.dut tl_rv_timer_o.a_address[31:31]
+-node tb.dut tl_usbdev_o.a_address[19:12]
+-node tb.dut tl_usbdev_o.a_address[21:21]
+-node tb.dut tl_usbdev_o.a_address[29:23]
+-node tb.dut tl_usbdev_o.a_address[31:31]
+-node tb.dut tl_pwrmgr_o.a_address[21:12]
+-node tb.dut tl_pwrmgr_o.a_address[29:23]
+-node tb.dut tl_pwrmgr_o.a_address[31:31]
+-node tb.dut tl_rstmgr_o.a_address[15:12]
+-node tb.dut tl_rstmgr_o.a_address[21:17]
+-node tb.dut tl_rstmgr_o.a_address[29:23]
+-node tb.dut tl_rstmgr_o.a_address[31:31]
+-node tb.dut tl_clkmgr_o.a_address[16:12]
+-node tb.dut tl_clkmgr_o.a_address[21:18]
+-node tb.dut tl_clkmgr_o.a_address[29:23]
+-node tb.dut tl_clkmgr_o.a_address[31:31]
+-node tb.dut tl_ram_ret_o.a_address[26:12]
+-node tb.dut tl_ram_ret_o.a_address[31:29]
+-node tb.dut tl_otp_ctrl_o.a_address[15:14]
+-node tb.dut tl_otp_ctrl_o.a_address[19:18]
+-node tb.dut tl_otp_ctrl_o.a_address[29:21]
+-node tb.dut tl_otp_ctrl_o.a_address[31:31]
+-node tb.dut tl_lc_ctrl_o.a_address[17:12]
+-node tb.dut tl_lc_ctrl_o.a_address[19:19]
+-node tb.dut tl_lc_ctrl_o.a_address[29:21]
+-node tb.dut tl_lc_ctrl_o.a_address[31:31]
+-node tb.dut tl_sensor_ctrl_o.a_address[15:12]
+-node tb.dut tl_sensor_ctrl_o.a_address[19:17]
+-node tb.dut tl_sensor_ctrl_o.a_address[29:21]
+-node tb.dut tl_sensor_ctrl_o.a_address[31:31]
+-node tb.dut tl_alert_handler_o.a_address[15:12]
+-node tb.dut tl_alert_handler_o.a_address[17:17]
+-node tb.dut tl_alert_handler_o.a_address[19:19]
+-node tb.dut tl_alert_handler_o.a_address[29:21]
+-node tb.dut tl_alert_handler_o.a_address[31:31]
+-node tb.dut tl_sram_ctrl_ret_o.a_address[15:12]
+-node tb.dut tl_sram_ctrl_ret_o.a_address[19:17]
+-node tb.dut tl_sram_ctrl_ret_o.a_address[21:21]
+-node tb.dut tl_sram_ctrl_ret_o.a_address[29:23]
+-node tb.dut tl_sram_ctrl_ret_o.a_address[31:31]
+-node tb.dut tl_nmi_gen_o.a_address[16:12]
+-node tb.dut tl_nmi_gen_o.a_address[19:19]
+-node tb.dut tl_nmi_gen_o.a_address[29:21]
+-node tb.dut tl_nmi_gen_o.a_address[31:31]
+-node tb.dut tl_ast_wrapper_o.a_address[18:12]
+-node tb.dut tl_ast_wrapper_o.a_address[29:21]
+-node tb.dut tl_ast_wrapper_o.a_address[31:31]
+
+begin tgl
+ -tree tb
+ +tree tb.dut 1
+ -node tb.dut.scanmode_i
+end
+
diff --git a/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_peri_sim_cfg.hjson b/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_peri_sim_cfg.hjson
index 90cc441..80ca5fc 100644
--- a/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_peri_sim_cfg.hjson
+++ b/hw/top_earlgrey/ip/xbar_peri/dv/autogen/xbar_peri_sim_cfg.hjson
@@ -12,8 +12,8 @@
// Testplan hjson file.
testplan: "{proj_root}/hw/top_earlgrey/ip/{dut}/data/autogen/{dut}_testplan.hjson"
- // Add xbar_peri specific exclusion files.
- vcs_cov_excl_files: ["{proj_root}/hw/top_earlgrey/ip/{dut}/dv/cov/xbar_cov_excl.el"]
+ // Add xbar_main specific exclusion files.
+ vcs_cov_excl_files: ["{proj_root}/hw/top_earlgrey/ip/{dut}/dv/autogen/xbar_cov_excl.el"]
// Import additional common sim cfg files.
import_cfgs: [// xbar common sim cfg file
diff --git a/util/tlgen/generate_tb.py b/util/tlgen/generate_tb.py
index e5699a7..c417ab3 100644
--- a/util/tlgen/generate_tb.py
+++ b/util/tlgen/generate_tb.py
@@ -19,7 +19,7 @@
tb_files = [
"xbar_env_pkg__params.sv", "tb__xbar_connect.sv", "xbar.sim.core",
"xbar.bind.core", "xbar.bind.sv", "xbar.sim_cfg.hjson",
- "xbar.testplan.hjson", "xbar_cov_excl.el"
+ "xbar.testplan.hjson", "xbar_cov_excl.el", "xbar_cover.cfg"
]
for fname in tb_files:
diff --git a/util/tlgen/xbar.sim_cfg.hjson.tpl b/util/tlgen/xbar.sim_cfg.hjson.tpl
index 68566ad..087ed02 100644
--- a/util/tlgen/xbar.sim_cfg.hjson.tpl
+++ b/util/tlgen/xbar.sim_cfg.hjson.tpl
@@ -12,8 +12,8 @@
// Testplan hjson file.
testplan: "{proj_root}/${xbar.ip_path}/data/autogen/{dut}_testplan.hjson"
- // Add xbar_${xbar.name} specific exclusion files.
- vcs_cov_excl_files: ["{proj_root}/${xbar.ip_path}/dv/cov/xbar_cov_excl.el"]
+ // Add xbar_main specific exclusion files.
+ vcs_cov_excl_files: ["{proj_root}/hw/top_earlgrey/ip/{dut}/dv/autogen/xbar_cov_excl.el"]
// Import additional common sim cfg files.
import_cfgs: [// xbar common sim cfg file
diff --git a/util/tlgen/xbar_cov_excl.el.tpl b/util/tlgen/xbar_cov_excl.el.tpl
index 85f242e..cf9f294 100644
--- a/util/tlgen/xbar_cov_excl.el.tpl
+++ b/util/tlgen/xbar_cov_excl.el.tpl
@@ -3,97 +3,26 @@
// SPDX-License-Identifier: Apache-2.0
//
// xbar_cov_excl.el generated by `tlgen.py` tool
-<%
- import math
- # or all start & end addresses to get toggle bits
- def get_device_addr_toggle_bits(dev_name):
- for device in xbar.devices:
- if device.name == dev_name:
- for i in range(len(device.addr_range)):
- if i == 0:
- toggle_bits = device.addr_range[i][0]
- else:
- toggle_bits ^= device.addr_range[i][0]
- for addr in device.addr_range:
- toggle_bits |= addr[1] - addr[0]
- return toggle_bits
- log.error("Invalid dev_name: {}".format(dev_name))
-
- num_hosts = len(xbar.hosts)
- if num_hosts > 1:
- host_unr_source_bits = math.ceil(math.log2(num_hosts))
- else:
- host_unr_source_bits = 0
-%>\
-
-ANNOTATION: "[UNSUPPORTED]"
-MODULE: prim_fifo_sync
-Branch 2 "2323268504" "(!rst_ni)" (1) "(!rst_ni) 0,1,-,-"
-Branch 3 "3736627057" "(!rst_ni)" (1) "(!rst_ni) 0,1,-,-"
-
-% for i in range(2, num_hosts + 1):
-ANNOTATION: "[UNR]"
-MODULE: prim_arbiter_ppc ( parameter N=${i},DW=102,EnDataPort=1,EnReqStabA=0 )
-Condition 2 "175047464" "(valid_o && ((!ready_i))) 1 -1" (2 "10")
-%endfor
ANNOTATION: "[NON_RTL]"
MODULE: uvm_pkg
Assert \uvm_reg_map::do_write .unnamed$$_0.unnamed$$_1 "assertion"
Assert \uvm_reg_map::do_read .unnamed$$_0.unnamed$$_1 "assertion"
-INSTANCE: tb.dut
-ANNOTATION: "[UNSUPPORTED]"
+ANNOTATION: "[UNSUPPORTED] scan mode isn't available in RTL sim"
+MODULE: xbar_${xbar.name}
Block 1 "0" "assign unused_scanmode = scanmode_i;"
-ANNOTATION: "[UNSUPPORTED]"
-Toggle scanmode_i
+% if len(xbar.hosts) > 1:
+ANNOTATION: "[UNR]"
+MODULE: prim_fifo_sync
+Branch 2 "2323268504" "(!rst_ni)" (1) "(!rst_ni) 0,1,-,-"
+Branch 3 "3736627057" "(!rst_ni)" (1) "(!rst_ni) 0,1,-,-"
-ANNOTATION: "[UNR] these device address bits are always 0"
-% for device in xbar.devices:
-<%
- toggle_bits = get_device_addr_toggle_bits(device.name)
-%>\
- % for i in range(32):
- % if toggle_bits % 2 == 0:
-Toggle tl_${device.name}_o.a_address [${i}]
- % endif
-<%
- toggle_bits = toggle_bits >> 1
-%>\
- % endfor
-% endfor
+% endif
+% for i in range(2, len(xbar.hosts) + 1):
+ANNOTATION: "[UNR]"
+MODULE: prim_arbiter_ppc ( parameter N=${i},DW=102,EnDataPort=1,EnReqStabA=0 )
+Condition 2 "175047464" "(valid_o && ((!ready_i))) 1 -1" (2 "10")
-% for i in range(host_unr_source_bits):
- % for host in xbar.hosts:
-Toggle tl_${host.name}_i.a_source [${7 - i}]
-Toggle tl_${host.name}_o.d_source [${7 - i}]
- % endfor
- % for device in xbar.devices:
-Toggle tl_${device.name}_o.a_source [${7 - i}]
-Toggle tl_${device.name}_i.d_source [${7 - i}]
- % endfor
-% endfor
-
-% for host in xbar.hosts:
-Toggle tl_${host.name}_i.a_param
-Toggle tl_${host.name}_o.d_param
-
-Toggle tl_${host.name}_o.d_user
-Toggle tl_${host.name}_i.a_user.rsvd1
-Toggle tl_${host.name}_i.a_user.parity
-Toggle tl_${host.name}_i.a_user.parity_en
-
-Toggle tl_${host.name}_o.d_opcode [2:1]
-% endfor
-% for device in xbar.devices:
-Toggle tl_${device.name}_o.a_param
-Toggle tl_${device.name}_i.d_param
-
-Toggle tl_${device.name}_i.d_user
-Toggle tl_${device.name}_o.a_user.rsvd1
-Toggle tl_${device.name}_o.a_user.parity
-Toggle tl_${device.name}_o.a_user.parity_en
-
-Toggle tl_${device.name}_i.d_opcode [2:1]
-% endfor
+%endfor
diff --git a/util/tlgen/xbar_cover.cfg.tpl b/util/tlgen/xbar_cover.cfg.tpl
new file mode 100644
index 0000000..9011125
--- /dev/null
+++ b/util/tlgen/xbar_cover.cfg.tpl
@@ -0,0 +1,82 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// xbar_cover.cfg generated by `tlgen.py` tool
+<%
+ import math
+ # or all start & end addresses to get toggle_bits
+ def get_device_addr_toggle_bits(dev_name):
+ for device in xbar.devices:
+ if device.name == dev_name:
+ for i in range(len(device.addr_range)):
+ if i == 0:
+ toggle_bits = device.addr_range[i][0]
+ else:
+ toggle_bits ^= device.addr_range[i][0]
+ for addr in device.addr_range:
+ toggle_bits |= addr[1] - addr[0]
+
+ return toggle_bits
+ log.error("Invalid dev_name: {}".format(dev_name))
+
+ num_hosts = len(xbar.hosts)
+ if num_hosts > 1:
+ host_unr_source_bits = math.ceil(math.log2(num_hosts))
+ else:
+ host_unr_source_bits = 0
+%>\
+
++tree tb.dut
+-module pins_if // DV construct.
+-module clk_rst_if // DV construct.
+
+// due to VCS issue (fixed at VCS/2020.12), can't move this part into begin...end (tgl) or after.
+-node tb.dut tl_*.a_param
+-node tb.dut tl_*.d_param
+-node tb.dut tl_*.d_user
+-node tb.dut tl_*.a_user.*
+-node tb.dut tl_*.d_opcode[2:1]
+
+// [UNR] these device address bits are always 0
+ % for device in xbar.devices:
+<%
+ # assume toggle_bits = 0011, generate below as bit 2 and 3 are never toggled
+ # -node address[3:2]
+ toggle_bits = get_device_addr_toggle_bits(device.name)
+ start_bit = 0
+ saw_first_zero = 0
+%>\
+ % for i in range(32):
+ % if toggle_bits % 2 == 0:
+ % if saw_first_zero == 0:
+<%
+ start_bit = i
+ saw_first_zero = 1
+%>\
+ % endif
+ % elif saw_first_zero == 1:
+-node tb.dut tl_${device.name}_o.a_address[${i-1}:${start_bit}]
+<%
+ saw_first_zero = 0
+%>\
+ % endif
+<%
+ toggle_bits = toggle_bits >> 1
+%>\
+ % endfor
+ % if saw_first_zero == 1:
+-node tb.dut tl_${device.name}_o.a_address[31:${start_bit}]
+ % endif
+ % endfor
+
+% if host_unr_source_bits > 0:
+-node tb.dut tl_*.a_source[7:${7 - host_unr_source_bits}]
+-node tb.dut tl_*.d_source[7:${7 - host_unr_source_bits}]
+% endif
+begin tgl
+ -tree tb
+ +tree tb.dut 1
+ -node tb.dut.scanmode_i
+end
+
