commit 541e9d4bde4e9f796698eae90c8b41e3d2a9beac
author Timothy Chen <timothytim@google.com> Wed Sep 08 11:30:18 2021 -0700
committer tjaychen <timothytim@google.com> Wed Sep 08 14:16:42 2021 -0700
tree ab445bd54f6affe5eaac60a7f63b80bb7464d850
parent be139be85c3a9bfcba7219f4b8413196949b051e

[alert_handler] Add new signals to alert aggregation

Signed-off-by: Timothy Chen <timothytim@google.com>

hw/ip/alert_handler/rtl/alert_handler_reg_wrap.sv

diff --git a/hw/ip/alert_handler/rtl/alert_handler_reg_wrap.sv b/hw/ip/alert_handler/rtl/alert_handler_reg_wrap.sv
index 0344e82..8e7dde7 100644
--- a/hw/ip/alert_handler/rtl/alert_handler_reg_wrap.sv
+++ b/hw/ip/alert_handler/rtl/alert_handler_reg_wrap.sv
@@ -461,7 +461,17 @@
       reg2hw.classd_phase0_cyc_shadowed.err_update,
       reg2hw.classd_phase1_cyc_shadowed.err_update,
       reg2hw.classd_phase2_cyc_shadowed.err_update,
-      reg2hw.classd_phase3_cyc_shadowed.err_update
+      reg2hw.classd_phase3_cyc_shadowed.err_update,
+
+      reg2hw.classa_crashdump_trigger_shadowed.err_update,
+      reg2hw.classb_crashdump_trigger_shadowed.err_update,
+      reg2hw.classc_crashdump_trigger_shadowed.err_update,
+      reg2hw.classd_crashdump_trigger_shadowed.err_update,
+
+      reg2hw.classa_clr_shadowed.err_update,
+      reg2hw.classb_clr_shadowed.err_update,
+      reg2hw.classc_clr_shadowed.err_update,
+      reg2hw.classd_clr_shadowed.err_update
     };
 
     reg2hw_wrap.shadowed_err_storage |= |{
@@ -545,7 +555,17 @@
       reg2hw.classd_phase0_cyc_shadowed.err_storage,
       reg2hw.classd_phase1_cyc_shadowed.err_storage,
       reg2hw.classd_phase2_cyc_shadowed.err_storage,
-      reg2hw.classd_phase3_cyc_shadowed.err_storage
+      reg2hw.classd_phase3_cyc_shadowed.err_storage,
+
+      reg2hw.classa_crashdump_trigger_shadowed.err_storage,
+      reg2hw.classb_crashdump_trigger_shadowed.err_storage,
+      reg2hw.classc_crashdump_trigger_shadowed.err_storage,
+      reg2hw.classd_crashdump_trigger_shadowed.err_storage,
+
+      reg2hw.classa_clr_shadowed.err_storage,
+      reg2hw.classb_clr_shadowed.err_storage,
+      reg2hw.classc_clr_shadowed.err_storage,
+      reg2hw.classd_clr_shadowed.err_storage
     };
   end