commit 5415941f72d52ea98a1b5e82dbddfceae150b622
author Miguel Young de la Sota <mcyoung@google.com> Wed Nov 04 15:15:08 2020 -0500
committer Miguel Young <mcyoung@google.com> Thu Nov 05 15:35:30 2020 -0500
tree 75199460ebec892d26ef833c9c22e62ac4d2cdd5
parent 1ff419462b038f89218f78dc5dc69d0a4029cc68

[dif/spi_device] Use new bitfield reggen constants

Signed-off-by: Miguel Young de la Sota <mcyoung@google.com>

sw/device/lib/dif/dif_spi_device.c

diff --git a/sw/device/lib/dif/dif_spi_device.c b/sw/device/lib/dif/dif_spi_device.c
index c8cb778..a184cf5 100644
--- a/sw/device/lib/dif/dif_spi_device.c
+++ b/sw/device/lib/dif/dif_spi_device.c
@@ -38,11 +38,7 @@
                              config.tx_order == kDifSpiDeviceBitOrderLsbToMsb);
   val = bitfield_bit32_write(val, SPI_DEVICE_CFG_RX_ORDER_BIT,
                              config.rx_order == kDifSpiDeviceBitOrderLsbToMsb);
-  val = bitfield_field32_write(val,
-                               (bitfield_field32_t){
-                                   .mask = SPI_DEVICE_CFG_TIMER_V_MASK,
-                                   .index = SPI_DEVICE_CFG_TIMER_V_OFFSET,
-                               },
+  val = bitfield_field32_write(val, SPI_DEVICE_CFG_TIMER_V_FIELD,
                                config.rx_fifo_timeout);
 
   return val;
@@ -69,36 +65,16 @@
   }
 
   uint32_t rx_fifo_bounds = 0;
-  rx_fifo_bounds =
-      bitfield_field32_write(rx_fifo_bounds,
-                             (bitfield_field32_t){
-                                 .mask = SPI_DEVICE_RXF_ADDR_BASE_MASK,
-                                 .index = SPI_DEVICE_RXF_ADDR_BASE_OFFSET,
-                             },
-                             rx_fifo_start);
-  rx_fifo_bounds =
-      bitfield_field32_write(rx_fifo_bounds,
-                             (bitfield_field32_t){
-                                 .mask = SPI_DEVICE_RXF_ADDR_LIMIT_MASK,
-                                 .index = SPI_DEVICE_RXF_ADDR_LIMIT_OFFSET,
-                             },
-                             rx_fifo_end);
+  rx_fifo_bounds = bitfield_field32_write(
+      rx_fifo_bounds, SPI_DEVICE_RXF_ADDR_BASE_FIELD, rx_fifo_start);
+  rx_fifo_bounds = bitfield_field32_write(
+      rx_fifo_bounds, SPI_DEVICE_RXF_ADDR_LIMIT_FIELD, rx_fifo_end);
 
   uint32_t tx_fifo_bounds = 0;
-  tx_fifo_bounds =
-      bitfield_field32_write(tx_fifo_bounds,
-                             (bitfield_field32_t){
-                                 .mask = SPI_DEVICE_TXF_ADDR_BASE_MASK,
-                                 .index = SPI_DEVICE_TXF_ADDR_BASE_OFFSET,
-                             },
-                             tx_fifo_start);
-  tx_fifo_bounds =
-      bitfield_field32_write(tx_fifo_bounds,
-                             (bitfield_field32_t){
-                                 .mask = SPI_DEVICE_TXF_ADDR_LIMIT_MASK,
-                                 .index = SPI_DEVICE_TXF_ADDR_LIMIT_OFFSET,
-                             },
-                             tx_fifo_end);
+  tx_fifo_bounds = bitfield_field32_write(
+      tx_fifo_bounds, SPI_DEVICE_TXF_ADDR_BASE_FIELD, tx_fifo_start);
+  tx_fifo_bounds = bitfield_field32_write(
+      tx_fifo_bounds, SPI_DEVICE_TXF_ADDR_LIMIT_FIELD, tx_fifo_end);
 
   spi->rx_fifo_len = config.rx_fifo_len;
   spi->tx_fifo_len = config.tx_fifo_len;
@@ -305,20 +281,10 @@
   }
 
   uint32_t compressed_limit = 0;
-  compressed_limit =
-      bitfield_field32_write(compressed_limit,
-                             (bitfield_field32_t){
-                                 .mask = SPI_DEVICE_FIFO_LEVEL_RXLVL_MASK,
-                                 .index = SPI_DEVICE_FIFO_LEVEL_RXLVL_OFFSET,
-                             },
-                             rx_level);
-  compressed_limit =
-      bitfield_field32_write(compressed_limit,
-                             (bitfield_field32_t){
-                                 .mask = SPI_DEVICE_FIFO_LEVEL_TXLVL_MASK,
-                                 .index = SPI_DEVICE_FIFO_LEVEL_TXLVL_OFFSET,
-                             },
-                             tx_level);
+  compressed_limit = bitfield_field32_write(
+      compressed_limit, SPI_DEVICE_FIFO_LEVEL_RXLVL_FIELD, rx_level);
+  compressed_limit = bitfield_field32_write(
+      compressed_limit, SPI_DEVICE_FIFO_LEVEL_TXLVL_FIELD, tx_level);
   mmio_region_write32(spi->params.base_addr, SPI_DEVICE_FIFO_LEVEL_REG_OFFSET,
                       compressed_limit);