| commit | 53beeee42baf74bacf84599e1a25aa321f226720 | [log] [tgz] |
|---|---|---|
| author | Cindy Chen <chencindy@opentitan.org> | Mon Jun 14 11:18:49 2021 -0700 |
| committer | cindychip <cindy.chen0316@gmail.com> | Wed Jun 16 09:32:07 2021 -0700 |
| tree | e91dcafe1b17a555705b60ace2e3ccc53eb0f233 | |
| parent | 57fb5512efe0e116194d6a57caf14b91555492d3 [diff] |
[dv/otp_ctrl] Minor improvement on OTP_CTRL testbench 1. Remove redundant clear_otp_memory: with static queue and associative array to store used address, we can remove clear_otp_memory in stress_all_with_rand_reset test. 2. Add a lc_transition req before running dai_error_test to add more possibility for lc program write-blank-error. Signed-off-by: Cindy Chen <chencindy@opentitan.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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