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opensecura/3p/lowrisc/opentitan/51243491cc5b26f83bfa864a8ac22eee3b1039df/./util/topgen/templates
tree: f321fef4fb5d2579c3bb38f602d903251502bc80
  1. chip_env_pkg__params.sv.tpl
  2. chiplevel.sv.tpl
  3. clang-format
  4. meson.build.tpl
  5. plic_all_irqs_test.c.tpl
  6. README.md
  7. tb__alert_handler_connect.sv.tpl
  8. tb__xbar_connect.sv.tpl
  9. toplevel.c.tpl
  10. toplevel.h.tpl
  11. toplevel.sv.tpl
  12. toplevel_memory.h.tpl
  13. toplevel_memory.ld.tpl
  14. toplevel_pkg.sv.tpl
  15. toplevel_rnd_cnst_pkg.sv.tpl
  16. xbar_env_pkg__params.sv.tpl
  17. xbar_tgl_excl.cfg.tpl
util/topgen/templates/README.md

OpenTitan topgen templates

This directory contains templates used by topgen to assembly a chip toplevel.