| commit | f7925e7e8387eab7bd39db95721df328b2e64ec1 | [log] [tgz] |
|---|---|---|
| author | Philipp Wagner <phw@lowrisc.org> | Wed Aug 25 20:18:30 2021 +0200 |
| committer | Philipp Wagner <mail@philipp-wagner.com> | Thu Aug 26 18:04:29 2021 +0200 |
| tree | a3a8d98f4b009044bdf4be1524aafff0ff573aff | |
| parent | e74541680867f1843dddcd87ccd5b0d516d9e16c [diff] |
[otbn] Create an UNIMP instruction Add a new instruction alias to OTBN's ISA which is guaranteed to generate an invalid instruction error. The UNIMP instruction is meant typically used in an unreachable code path, like an `assert(1)` statement. An invalid instruction is a recoverable error in OTBN, which terminates the execution immediately, returns control to the host CPU, and additionally raises a recoverable alert. In line with other instructions in the base instruction set of OTBN, UNIMP is also borrowed from RISC-V, where it is defined in the same way as de-facto instruction alias. See also https://groups.google.com/a/groups.riscv.org/g/sw-dev/c/Xu6UmcIAKIk/m/piJEHdBlAAAJ and https://github.com/riscv/riscv-asm-manual/blob/master/riscv-asm.md for more information on the choice of encoding. Due to us piggy-backing on RISC-V, GNU Binutils already supports the alias out of the box, which means we don't need to do anything in our OTBN toolchain to gain support for it, and can use `unimp` in assembly without further changes. Fixes #6147 Signed-off-by: Philipp Wagner <phw@lowrisc.org>
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