[sysrst_ctrl,dv] Change sampling cond of func cov

Signed-off-by: Madhuri Patel <madhuri.patel@ensilica.com>
diff --git a/hw/ip/sysrst_ctrl/dv/cov/sysrst_ctrl_cov_if.sv b/hw/ip/sysrst_ctrl/dv/cov/sysrst_ctrl_cov_if.sv
index 04c6332..9b06d11 100644
--- a/hw/ip/sysrst_ctrl/dv/cov/sysrst_ctrl_cov_if.sv
+++ b/hw/ip/sysrst_ctrl/dv/cov/sysrst_ctrl_cov_if.sv
@@ -23,7 +23,12 @@
     bit bat_disable,
     bit interrupt,
     bit ec_rst,
-    bit rst_req
+    bit rst_req,
+    bit key0_in_sel,
+    bit key1_in_sel,
+    bit key2_in_sel,
+    bit pwrb_in_sel,
+    bit ac_present_sel
   );
     option.per_instance = 1;
     option.name = $sformatf("sysrst_ctrl_combo_detect_action_cg_%0d", index);
@@ -32,6 +37,19 @@
     cp_interrupt:   coverpoint interrupt;
     cp_ec_rst:      coverpoint ec_rst;
     cp_rst_req:     coverpoint rst_req;
+    cp_key0_in_sel:   coverpoint key0_in_sel;
+    cp_key1_in_sel:   coverpoint key1_in_sel;
+    cp_key2_in_sel:   coverpoint key2_in_sel;
+    cp_pwrb_in_sel:   coverpoint pwrb_in_sel;
+    cp_ac_present_sel:coverpoint ac_present_sel;
+    cross_bat_disable_combo_sel: cross cp_bat_disable, cp_key0_in_sel, cp_key1_in_sel,
+         cp_key2_in_sel, cp_pwrb_in_sel, cp_ac_present_sel;
+    cross_interrupt_combo_sel: cross cp_bat_disable, cp_key0_in_sel, cp_key1_in_sel,
+         cp_key2_in_sel, cp_pwrb_in_sel, cp_ac_present_sel;
+    cross_ec_rst_combo_sel: cross cp_bat_disable, cp_key0_in_sel, cp_key1_in_sel,
+         cp_key2_in_sel, cp_pwrb_in_sel, cp_ac_present_sel;
+    cross_rst_req_combo_sel: cross cp_bat_disable, cp_key0_in_sel, cp_key1_in_sel,
+         cp_key2_in_sel, cp_pwrb_in_sel, cp_ac_present_sel;
   endgroup // sysrst_ctrl_combo_detect_action_cg
 
   ////////////////////////////////////////////////
@@ -104,7 +122,16 @@
     bit combo0_h2l,
     bit combo1_h2l,
     bit combo2_h2l,
-    bit combo3_h2l
+    bit combo3_h2l,
+    bit key0_in_sel,
+    bit key1_in_sel,
+    bit key2_in_sel,
+    bit pwrb_in_sel,
+    bit ac_present_sel,
+    bit bat_disable,
+    bit interrupt,
+    bit ec_rst,
+    bit rst_req
   );
     option.per_instance = 1;
     option.name = "sysrst_ctrl_combo_intr_status_cg";
@@ -113,6 +140,23 @@
     cp_combo1_h2l: coverpoint combo1_h2l;
     cp_combo2_h2l: coverpoint combo2_h2l;
     cp_combo3_h2l: coverpoint combo3_h2l;
+    cp_key0_in_sel:   coverpoint key0_in_sel;
+    cp_key1_in_sel:   coverpoint key1_in_sel;
+    cp_key2_in_sel:   coverpoint key2_in_sel;
+    cp_pwrb_in_sel:   coverpoint pwrb_in_sel;
+    cp_ac_present_sel:coverpoint ac_present_sel;
+    cp_bat_disable: coverpoint bat_disable;
+    cp_interrupt:   coverpoint interrupt;
+    cp_ec_rst:      coverpoint ec_rst;
+    cp_rst_req:     coverpoint rst_req;
+    cross_combo0: cross cp_combo0_h2l, cp_key0_in_sel, cp_key1_in_sel, cp_key2_in_sel,
+       cp_pwrb_in_sel, cp_ac_present_sel, cp_bat_disable, cp_interrupt, cp_ec_rst, cp_rst_req;
+    cross_combo1: cross cp_combo1_h2l, cp_key0_in_sel, cp_key1_in_sel, cp_key2_in_sel,
+       cp_pwrb_in_sel, cp_ac_present_sel, cp_bat_disable, cp_interrupt, cp_ec_rst, cp_rst_req;
+    cross_combo2: cross cp_combo2_h2l, cp_key0_in_sel, cp_key1_in_sel, cp_key2_in_sel,
+       cp_pwrb_in_sel, cp_ac_present_sel, cp_bat_disable, cp_interrupt, cp_ec_rst, cp_rst_req;
+    cross_combo3: cross cp_combo3_h2l, cp_key0_in_sel, cp_key1_in_sel, cp_key2_in_sel,
+       cp_pwrb_in_sel, cp_ac_present_sel, cp_bat_disable, cp_interrupt, cp_ec_rst, cp_rst_req;
 
   endgroup // sysrst_ctrl_combo_intr_status_cg
 
@@ -156,33 +200,34 @@
 
   endgroup // sysrst_ctrl_key_intr_status_cg
 
-  //////////////////////////////////////////////////
-  // Ultra low power status register cover points //
-  //////////////////////////////////////////////////
+  ///////////////////////////////
+  // Wakeup event cover points //
+  ///////////////////////////////
 
-  covergroup sysrst_ctrl_ulp_status_cg with function sample (
-    bit ulp_wakeup
+  covergroup sysrst_ctrl_wkup_event_cg with function sample (
+    bit wakeup_sts,
+    bit h2l_pwrb,
+    bit l2h_lid_open,
+    bit h_ac_present,
+    bit interrupt_gen
   );
     option.per_instance = 1;
-    option.name = "sysrst_ctrl_ulp_status_cg";
-
-    cp_ulp_wakeup: coverpoint ulp_wakeup;
-
-  endgroup // sysrst_ctrl_ulp_status_cg
-
-  /////////////////////////////////////////
-  // Wakeup status register cover points //
-  /////////////////////////////////////////
-
-  covergroup sysrst_ctrl_wkup_status_cg with function sample (
-    bit wakeup_sts
-  );
-    option.per_instance = 1;
-    option.name = "sysrst_ctrl_wkup_status_cg";
+    option.name = "sysrst_ctrl_wkup_event_cg";
 
     cp_wakeup_sts: coverpoint wakeup_sts;
-
-  endgroup // sysrst_ctrl_wkup_status_cg
+    cp_h2l_pwrb: coverpoint h2l_pwrb;
+    cp_l2h_lid_open: coverpoint l2h_lid_open;
+    cp_h_ac_present: coverpoint h_ac_present;
+    cp_interrupt_gen: coverpoint interrupt_gen;
+    cross_wkup_sts: cross cp_wakeup_sts, cp_h2l_pwrb, cp_l2h_lid_open, cp_h_ac_present,
+      cp_interrupt_gen {
+        ignore_bins invalid = binsof(cp_h2l_pwrb) intersect {1} &&
+                            binsof(cp_l2h_lid_open) intersect {0} &&
+                            binsof(cp_h_ac_present) intersect {0} &&
+                            binsof(cp_wakeup_sts) intersect {0} &&
+                            binsof(cp_interrupt_gen) intersect {0};
+      }
+  endgroup // sysrst_ctrl_wkup_event_cg
 
   //////////////////////////////////////
   // Pin in value register cover points //
@@ -211,28 +256,7 @@
 
   endgroup // sysrst_ctrl_pin_in_value_cg
 
-  /////////////////////////////////////
-  // Auto block out ctl cover points //
-  /////////////////////////////////////
-  covergroup sysrst_ctrl_auto_blk_out_ctl_cg with function sample (
-    bit key0_out_sel,
-    bit key1_out_sel,
-    bit key2_out_sel,
-    bit key0_out_value,
-    bit key1_out_value,
-    bit key2_out_value
-  );
-    option.per_instance = 1;
-    option.name = "sysrst_ctrl_auto_blk_out_ctl_cg";
 
-    cp_key0_out_sel: coverpoint key0_out_sel;
-    cp_key1_out_sel: coverpoint key1_out_sel;
-    cp_key2_out_sel: coverpoint key2_out_sel;
-    cp_key0_out_value: coverpoint key0_out_value;
-    cp_key1_out_value: coverpoint key1_out_value;
-    cp_key2_out_value: coverpoint key2_out_value;
-
-  endgroup // sysrst_ctrl_auto_blk_out_ctl_cg
 
   ///////////////////////////////////
   // Instantiation Macros          //
@@ -240,10 +264,8 @@
   `DV_FCOV_INSTANTIATE_CG(sysrst_ctrl_auto_block_debounce_ctl_cg)
   `DV_FCOV_INSTANTIATE_CG(sysrst_ctrl_combo_intr_status_cg)
   `DV_FCOV_INSTANTIATE_CG(sysrst_ctrl_key_intr_status_cg)
-  `DV_FCOV_INSTANTIATE_CG(sysrst_ctrl_ulp_status_cg)
-  `DV_FCOV_INSTANTIATE_CG(sysrst_ctrl_wkup_status_cg)
+  `DV_FCOV_INSTANTIATE_CG(sysrst_ctrl_wkup_event_cg)
   `DV_FCOV_INSTANTIATE_CG(sysrst_ctrl_pin_in_value_cg)
-  `DV_FCOV_INSTANTIATE_CG(sysrst_ctrl_auto_blk_out_ctl_cg)
 
   sysrst_ctrl_combo_detect_action_cg combo_detect_action_cg_inst[4];
   initial begin
@@ -274,10 +296,16 @@
     bit bat_disable,
     bit interrupt,
     bit ec_rst,
-    bit rst_req
+    bit rst_req,
+    bit key0_in_sel,
+    bit key1_in_sel,
+    bit key2_in_sel,
+    bit pwrb_in_sel,
+    bit ac_present_sel
   );
     foreach (combo_detect_action_cg_inst[i]) begin
-      combo_detect_action_cg_inst[index].sample(bat_disable, interrupt, ec_rst, rst_req);
+      combo_detect_action_cg_inst[index].sample(bat_disable, interrupt, ec_rst, rst_req,
+         key0_in_sel, key1_in_sel, key2_in_sel, pwrb_in_sel, ac_present_sel);
     end
   endfunction
 
@@ -315,9 +343,20 @@
     bit combo0_h2l,
     bit combo1_h2l,
     bit combo2_h2l,
-    bit combo3_h2l
+    bit combo3_h2l,
+    bit key0_in_sel,
+    bit key1_in_sel,
+    bit key2_in_sel,
+    bit pwrb_in_sel,
+    bit ac_present_sel,
+    bit bat_disable,
+    bit interrupt,
+    bit ec_rst,
+    bit rst_req
   );
-    sysrst_ctrl_combo_intr_status_cg_inst.sample(combo0_h2l,combo1_h2l,combo2_h2l,combo3_h2l);
+    sysrst_ctrl_combo_intr_status_cg_inst.sample(combo0_h2l,combo1_h2l,combo2_h2l,combo3_h2l,
+        key0_in_sel,key1_in_sel,key2_in_sel,pwrb_in_sel,ac_present_sel,bat_disable,
+        interrupt,ec_rst,rst_req);
   endfunction
 
   function automatic void cg_key_intr_status_sample (
@@ -341,16 +380,15 @@
            key2_in_l2h, ac_present_l2h, ec_rst_l_l2h, flash_wp_l_l2h);
   endfunction
 
-  function automatic void cg_ulp_status_sample (
-    bit ulp_wakeup
+  function automatic void cg_wkup_event_sample (
+    bit wakeup_sts,
+    bit h2l_pwrb,
+    bit l2h_lid_open,
+    bit h_ac_present,
+    bit interrupt_gen
   );
-    sysrst_ctrl_ulp_status_cg_inst.sample (ulp_wakeup);
-  endfunction
-
-  function automatic void cg_wkup_status_sample (
-    bit wakeup_sts
-  );
-    sysrst_ctrl_wkup_status_cg_inst.sample(wakeup_sts);
+    sysrst_ctrl_wkup_event_cg_inst.sample(wakeup_sts, h2l_pwrb, l2h_lid_open, h_ac_present,
+       interrupt_gen);
   endfunction
 
   function automatic void cg_pin_in_value_sample (
@@ -367,16 +405,4 @@
         key1_in, key2_in, lid_open, ac_present, ec_rst_l, flash_wp_l);
   endfunction
 
-   function automatic void cg_auto_blk_out_ctl_sample (
-    bit key0_out_sel,
-    bit key1_out_sel,
-    bit key2_out_sel,
-    bit key0_out_value,
-    bit key1_out_value,
-    bit key2_out_value
-  );
-    sysrst_ctrl_auto_blk_out_ctl_cg_inst.sample (key0_out_sel,
-        key1_out_sel, key2_out_sel, key0_out_value, key1_out_value, key2_out_value);
-  endfunction
-
 endinterface
diff --git a/hw/ip/sysrst_ctrl/dv/env/seq_lib/sysrst_ctrl_auto_blk_key_output_vseq.sv b/hw/ip/sysrst_ctrl/dv/env/seq_lib/sysrst_ctrl_auto_blk_key_output_vseq.sv
index 733850d..d4b7bd0 100644
--- a/hw/ip/sysrst_ctrl/dv/env/seq_lib/sysrst_ctrl_auto_blk_key_output_vseq.sv
+++ b/hw/ip/sysrst_ctrl/dv/env/seq_lib/sysrst_ctrl_auto_blk_key_output_vseq.sv
@@ -7,8 +7,6 @@
 class sysrst_ctrl_auto_blk_key_output_vseq extends sysrst_ctrl_base_vseq;
   `uvm_object_utils(sysrst_ctrl_auto_blk_key_output_vseq)
 
-  `uvm_object_new
-
    rand uvm_reg_data_t override_value;
    rand uint16_t set_timer;
    rand int cycles;
@@ -37,6 +35,40 @@
     cfg.vif.pwrb_in = 1;
    endtask
 
+   /////////////////////////////////////
+   // Auto block out ctl cover points //
+   /////////////////////////////////////
+   covergroup sysrst_ctrl_auto_blk_out_ctl_cg with function sample (
+    bit key0_out_sel,
+    bit key1_out_sel,
+    bit key2_out_sel,
+    bit key0_out_value,
+    bit key1_out_value,
+    bit key2_out_value,
+    bit key0_out,
+    bit key1_out,
+    bit key2_out
+   );
+    option.per_instance = 1;
+    option.name = "sysrst_ctrl_auto_blk_out_ctl_cg";
+
+    cp_key0_out_sel: coverpoint key0_out_sel;
+    cp_key1_out_sel: coverpoint key1_out_sel;
+    cp_key2_out_sel: coverpoint key2_out_sel;
+    cp_key0_out_value: coverpoint key0_out_value;
+    cp_key1_out_value: coverpoint key1_out_value;
+    cp_key2_out_value: coverpoint key2_out_value;
+    cross_key0_out_sel_value: cross cp_key0_out_value, key0_out;
+    cross_key1_out_sel_value: cross cp_key1_out_value, key1_out;
+    cross_key2_out_sel_value: cross cp_key2_out_value, key2_out;
+
+   endgroup // sysrst_ctrl_auto_blk_out_ctl_cg
+
+   function new(string name = "sysrst_ctrl_auto_blk_key_output_vseq");
+    super.new(name);
+    sysrst_ctrl_auto_blk_out_ctl_cg = new();
+   endfunction : new
+
    task body();
 
     bit enable_key0_out_sel, enable_key1_out_sel, enable_key2_out_sel;
@@ -98,8 +130,20 @@
         `DV_CHECK_EQ(cfg.vif.key2_out, 0);
       end
       cfg.clk_aon_rst_vif.wait_clks(20);
+
+      // Sample the covergroup
+      sysrst_ctrl_auto_blk_out_ctl_cg.sample (
+            enable_key0_out_sel,
+            enable_key1_out_sel,
+            enable_key2_out_sel,
+            override_key0_out_value,
+            override_key1_out_value,
+            override_key2_out_value,
+            cfg.vif.key0_out,
+            cfg.vif.key1_out,
+            cfg.vif.key2_out
+      );
     end
    endtask : body
 
 endclass : sysrst_ctrl_auto_blk_key_output_vseq
-
diff --git a/hw/ip/sysrst_ctrl/dv/env/sysrst_ctrl_scoreboard.sv b/hw/ip/sysrst_ctrl/dv/env/sysrst_ctrl_scoreboard.sv
index 090b045..550c6b0 100644
--- a/hw/ip/sysrst_ctrl/dv/env/sysrst_ctrl_scoreboard.sv
+++ b/hw/ip/sysrst_ctrl/dv/env/sysrst_ctrl_scoreboard.sv
@@ -38,9 +38,25 @@
   task run_phase(uvm_phase phase);
     super.run_phase(phase);
     fork
+      sample_wkup_event_cg();
     join_none
   endtask
 
+  protected virtual task sample_wkup_event_cg();
+    forever begin
+      @(posedge cfg.vif.z3_wakeup);
+      if (cfg.en_cov) begin
+        cov_if.cg_wkup_event_sample (
+          ral.wkup_status.get_mirrored_value(),
+          cfg.vif.pwrb_in,
+          cfg.vif.lid_open,
+          cfg.vif.ac_present,
+          cfg.intr_vif.pins
+        );
+      end
+    end
+  endtask
+
   virtual task process_tl_access(tl_seq_item item, tl_channels_e channel, string ral_name);
     uvm_reg        csr;
     bit            do_read_check = 1'b1;
@@ -83,17 +99,6 @@
       "key_invert_ctl": begin
       end
       "com_out_ctl_0","com_out_ctl_1","com_out_ctl_2","com_out_ctl_3": begin
-        if (addr_phase_write) begin
-          string csr_name = csr.get_name();
-          string str_idx = csr_name.getc(csr_name.len - 1);
-          int idx = str_idx.atoi();
-          cov_if.cg_combo_detect_actions_sample (idx,
-            get_field_val(ral.com_out_ctl[idx].bat_disable, item.a_data),
-            get_field_val(ral.com_out_ctl[idx].interrupt, item.a_data),
-            get_field_val(ral.com_out_ctl[idx].ec_rst, item.a_data),
-            get_field_val(ral.com_out_ctl[idx].rst_req, item.a_data)
-          );
-        end
       end
       "com_sel_ctl_0","com_sel_ctl_1","com_sel_ctl_2","com_sel_ctl_3": begin
          if (addr_phase_write) begin
@@ -128,14 +133,6 @@
       end
       "combo_intr_status": begin
         do_read_check = 1'b0;  //This check is done in sequence
-        if (data_phase_read) begin
-          cov_if.cg_combo_intr_status_sample (
-            get_field_val(ral.combo_intr_status.combo0_h2l, item.d_data),
-            get_field_val(ral.combo_intr_status.combo1_h2l, item.d_data),
-            get_field_val(ral.combo_intr_status.combo2_h2l, item.d_data),
-            get_field_val(ral.combo_intr_status.combo3_h2l, item.d_data)
-          );
-        end
       end
       "key_intr_status", "key_intr_ctl": begin
         do_read_check = 1'b0;
@@ -180,24 +177,9 @@
         );
       end
       "auto_block_out_ctl": begin
-        if (addr_phase_write) begin
-          cov_if.cg_auto_blk_out_ctl_sample (
-            get_field_val(ral.auto_block_out_ctl.key0_out_sel, item.a_data),
-            get_field_val(ral.auto_block_out_ctl.key1_out_sel, item.a_data),
-            get_field_val(ral.auto_block_out_ctl.key2_out_sel, item.a_data),
-            get_field_val(ral.auto_block_out_ctl.key0_out_value, item.a_data),
-            get_field_val(ral.auto_block_out_ctl.key1_out_value, item.a_data),
-            get_field_val(ral.auto_block_out_ctl.key2_out_value, item.a_data)
-          );
-        end
       end
       "wkup_status": begin
         do_read_check = 1'b0;  //This check is done in sequence
-        if (data_phase_read) begin
-          cov_if.cg_wkup_status_sample (
-            get_field_val(ral.wkup_status.wakeup_sts, item.d_data)
-          );
-        end
       end
       "ulp_ctl": begin
       end
@@ -231,14 +213,11 @@
       end
       "ulp_status": begin
         do_read_check = 1'b0; // This check is done in sequence
-        if (data_phase_read) begin
-          cov_if.cg_ulp_status_sample (
-            get_field_val(ral.ulp_status.ulp_wakeup, item.d_data)
-          );
-        end
       end
       "regwen":begin
       end
+      "alert_test":begin
+      end
       default: begin
        `uvm_error(`gfn, $sformatf("invalid csr: %0s", csr.get_full_name()))
       end