commit 4c8905e70ced9c69904e8fc8c3b67cdf2d26f645
author Timothy Chen <timothytim@google.com> Wed Aug 26 10:34:33 2020 -0700
committer tjaychen <timothytim@google.com> Thu Aug 27 21:14:59 2020 -0700
tree 5344db22440541eecaf273ebea5e3272a47e30cc
parent fb34fe3306817d977dcf1e4c204a11c25f225bf5

[clkmgr, rstmgr] Add clkmgr/rstmgr option to export selective clocks/resets

- The clocks / resets can be exported to multiple interfaces
- At the moment there is only ast

Signed-off-by: Timothy Chen <timothytim@google.com>

[topgen] automatically add exported clocks/resets to intermodule

Signed-off-by: Timothy Chen <timothytim@google.com>

hw/top_earlgrey/data/top_earlgrey.hjson

diff --git a/hw/top_earlgrey/data/top_earlgrey.hjson b/hw/top_earlgrey/data/top_earlgrey.hjson
index dbca431..b0cfd4f 100644
--- a/hw/top_earlgrey/data/top_earlgrey.hjson
+++ b/hw/top_earlgrey/data/top_earlgrey.hjson
@@ -288,6 +288,7 @@
       type: "usbdev",
       clock_srcs: {clk_i: "io", clk_usb_48mhz_i: "usb"},
       clock_group: "peri",
+      clock_reset_export: ["ast"],
       reset_connections: {rst_ni: "sys_io", rst_usb_48mhz_ni: "usb"},
       base_addr: "0x40150000",
     },
@@ -295,6 +296,7 @@
       type: "sensor_ctrl",
       clock_srcs: {clk_i: "io"},
       clock_group: "secure",
+      clock_reset_export: ["ast"],
       reset_connections: {rst_ni: "sys_io"},
       base_addr: "0x40170000",
       top_only: "true"
@@ -414,7 +416,7 @@
         'clkmgr.clk_main': 'clk_main',
         'clkmgr.clk_io': 'clk_io',
         'clkmgr.clk_usb': 'clk_usb',
-        'clkmgr.clk_aon': 'clk_aon'
+        'clkmgr.clk_aon': 'clk_aon',
         'rstmgr.ast': '',
         'pwrmgr.pwr_ast': '',
         'sensor_ctrl.ast_alert': '',