[top] Connect RomCtrlSkipCheck
- default this value to 1 (this should be changed later)
- for synthesis, explicitly pass in 0 (this should be removed later)
Signed-off-by: Timothy Chen <timothytim@google.com>
diff --git a/hw/syn/tools/dc/run-syn.tcl b/hw/syn/tools/dc/run-syn.tcl
index fd02e47..32a6d2f 100644
--- a/hw/syn/tools/dc/run-syn.tcl
+++ b/hw/syn/tools/dc/run-syn.tcl
@@ -81,7 +81,8 @@
set DEFINE "PRIM_DEFAULT_IMPL=${PRIM_DEFAULT_IMPL}+${PRIM_STD_CELL_VARIANT}"
# additional parameters
-set PARAMS ""
+set PARAMS "$::env(PARAMS)"
+
###########################
## Env var file ##
diff --git a/hw/syn/tools/dvsim/common_syn_cfg.hjson b/hw/syn/tools/dvsim/common_syn_cfg.hjson
index 823b9c6..0d0d039 100644
--- a/hw/syn/tools/dvsim/common_syn_cfg.hjson
+++ b/hw/syn/tools/dvsim/common_syn_cfg.hjson
@@ -20,6 +20,7 @@
// Default directory structure for the output
dut: "{name}"
+ params: ""
build_dir: "{scratch_path}/{build_mode}"
build_log: "{build_dir}/synthesis.log"
diff --git a/hw/syn/tools/dvsim/dc.hjson b/hw/syn/tools/dvsim/dc.hjson
index 05306fa..bc8c2d0 100644
--- a/hw/syn/tools/dvsim/dc.hjson
+++ b/hw/syn/tools/dvsim/dc.hjson
@@ -5,6 +5,7 @@
// Environment variables that are needed in the synthesis script
exports: [
{ DUT: "{dut}" },
+ { PARAMS: "{params}" },
{ CONSTRAINT: "{sdc_file}" },
{ FOUNDRY_CONSTRAINT: "{foundry_sdc_file}" },
{ BUILD_DIR: "{build_dir}" },
diff --git a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv
index c3754c1..659ebfa 100644
--- a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv
+++ b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv
@@ -9,7 +9,10 @@
// -o hw/top_earlgrey/ \
// --rnd_cnst_seed 4881560218908238235
-module chip_earlgrey_asic (
+module chip_earlgrey_asic #(
+ // TODO: Remove this 0 once infra is ready
+ parameter bit RomCtrlSkipCheck = 1
+) (
// Dedicated Pads
inout POR_N, // Manual Pad
inout USB_P, // Manual Pad
@@ -1102,7 +1105,8 @@
.KmacReuseShare(0),
.SramCtrlRetAonInstrExec(0),
.SramCtrlMainInstrExec(1),
- .PinmuxAonTargetCfg(PinmuxTargetCfg)
+ .PinmuxAonTargetCfg(PinmuxTargetCfg),
+ .RomCtrlSkipCheck(RomCtrlSkipCheck)
) top_earlgrey (
.rst_ni ( aon_pok ),
// ast connections
diff --git a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_nexysvideo.sv b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_nexysvideo.sv
index 16c3ffb..15682f0 100644
--- a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_nexysvideo.sv
+++ b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_nexysvideo.sv
@@ -15,7 +15,9 @@
parameter BootRomInitFile = "boot_rom_fpga_nexysvideo.32.vmem",
// Path to a VMEM file containing the contents of the emulated OTP, which will be
// baked into the FPGA bitstream.
- parameter OtpCtrlMemInitFile = "otp_img_fpga_nexysvideo.vmem"
+ parameter OtpCtrlMemInitFile = "otp_img_fpga_nexysvideo.vmem",
+ // TODO: Remove this 0 once infra is ready
+ parameter bit RomCtrlSkipCheck = 1
) (
// Dedicated Pads
inout POR_N, // Manual Pad
diff --git a/hw/top_earlgrey/syn/chip_earlgrey_asic_syn_cfg.hjson b/hw/top_earlgrey/syn/chip_earlgrey_asic_syn_cfg.hjson
index f3909ed..f4528bd 100644
--- a/hw/top_earlgrey/syn/chip_earlgrey_asic_syn_cfg.hjson
+++ b/hw/top_earlgrey/syn/chip_earlgrey_asic_syn_cfg.hjson
@@ -24,6 +24,12 @@
name: expand_modules
value: "top_earlgrey"
}
+
+ {
+ name: params
+ value: "RomCtrlSkipCheck=>0"
+ }
+
]
// Timing constraints for this module
diff --git a/util/topgen/templates/chiplevel.sv.tpl b/util/topgen/templates/chiplevel.sv.tpl
index c7df92e..5dc9f5e 100644
--- a/util/topgen/templates/chiplevel.sv.tpl
+++ b/util/topgen/templates/chiplevel.sv.tpl
@@ -80,10 +80,15 @@
parameter BootRomInitFile = "boot_rom_fpga_${target["name"]}.32.vmem",
// Path to a VMEM file containing the contents of the emulated OTP, which will be
// baked into the FPGA bitstream.
- parameter OtpCtrlMemInitFile = "otp_img_fpga_${target["name"]}.vmem"
+ parameter OtpCtrlMemInitFile = "otp_img_fpga_${target["name"]}.vmem",
+ // TODO: Remove this 0 once infra is ready
+ parameter bit RomCtrlSkipCheck = 1
) (
% else:
-module chip_${top["name"]}_${target["name"]} (
+module chip_${top["name"]}_${target["name"]} #(
+ // TODO: Remove this 0 once infra is ready
+ parameter bit RomCtrlSkipCheck = 1
+) (
% endif
<%
@@ -956,7 +961,8 @@
.KmacReuseShare(0),
.SramCtrlRetAonInstrExec(0),
.SramCtrlMainInstrExec(1),
- .PinmuxAonTargetCfg(PinmuxTargetCfg)
+ .PinmuxAonTargetCfg(PinmuxTargetCfg),
+ .RomCtrlSkipCheck(RomCtrlSkipCheck)
) top_${top["name"]} (
.rst_ni ( aon_pok ),
// ast connections
