| commit | 4ac735964069019021cab557d39f363691b38820 | [log] [tgz] |
|---|---|---|
| author | Martin Lueker-Boden <martin.lueker-boden@wdc.com> | Mon Oct 11 18:04:41 2021 -0700 |
| committer | Martin Lueker-Boden <47870387+martin-lueker@users.noreply.github.com> | Sat Oct 16 14:22:06 2021 -0700 |
| tree | 4e4def83b9c29c0772a2a66f248fdbdabdced5ff | |
| parent | 727f1312ea6602e586ff0b34029dd674c22e7ab6 [diff] |
[spi_host, rtl] Fix/Refactor state wait counters in SPI_HOST FSM - Fixes a bug in which there was no wait counter associated with the CSBSwitch state (it was using the wait_idle counter, but this counter was not being appropriately reset on entering CSBSwitch) - Refactors the wait_idle, wait_lead, and wait_trail counters into a single wait_cntr that can be commonly managed - wait_cntr is properly reset up entering the WaitIdle, WaitLead, WaitTrail and CSBSwitch states Signed-off-by: Martin Lueker-Boden <martin.lueker-boden@wdc.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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