[Earlgrey] Regenerate top for new tlgen Generate top for updated tlgen library. Now it has comportable hjson files and the RTL core file is moved to the ip top Signed-off-by: Eunchan Kim <eunchan@opentitan.org>
diff --git a/hw/top_earlgrey/ip/xbar_main/data/autogen/xbar_main.hjson b/hw/top_earlgrey/ip/xbar_main/data/autogen/xbar_main.hjson new file mode 100644 index 0000000..0fa41d3 --- /dev/null +++ b/hw/top_earlgrey/ip/xbar_main/data/autogen/xbar_main.hjson
@@ -0,0 +1,119 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +// xbar_main comportable IP spec generated by `tlgen.py` tool +{ name: "xbar_main" + clock_primary: "" + other_clock_list: [] + reset_primary: "" + other_reset_list: [] + //available_input_list: [] + + inter_signal_list: [ + // host + { struct: "tl" + type: "req_rsp" + name: "tl_corei" + act: "rsp" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_cored" + act: "rsp" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_dm_sba" + act: "rsp" + package: "tlul_pkg" + } + // device + { struct: "tl" + type: "req_rsp" + name: "tl_rom" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_debug_mem" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_ram_main" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_eflash" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_peri" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_flash_ctrl" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_hmac" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_aes" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_rv_plic" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_pinmux" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_padctrl" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_alert_handler" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_nmi_gen" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_otbn" + act: "req" + package: "tlul_pkg" + } + ] +}
diff --git a/hw/top_earlgrey/ip/xbar_main/rtl/autogen/xbar_main.core b/hw/top_earlgrey/ip/xbar_main/xbar_main.core similarity index 87% rename from hw/top_earlgrey/ip/xbar_main/rtl/autogen/xbar_main.core rename to hw/top_earlgrey/ip/xbar_main/xbar_main.core index c76aa9e..33f5e67 100644 --- a/hw/top_earlgrey/ip/xbar_main/rtl/autogen/xbar_main.core +++ b/hw/top_earlgrey/ip/xbar_main/xbar_main.core
@@ -12,8 +12,8 @@ depend: - lowrisc:ip:tlul files: - - tl_main_pkg.sv - - xbar_main.sv + - rtl/autogen/tl_main_pkg.sv + - rtl/autogen/xbar_main.sv file_type: systemVerilogSource
diff --git a/hw/top_earlgrey/ip/xbar_peri/data/autogen/xbar_peri.hjson b/hw/top_earlgrey/ip/xbar_peri/data/autogen/xbar_peri.hjson new file mode 100644 index 0000000..3deeb3a --- /dev/null +++ b/hw/top_earlgrey/ip/xbar_peri/data/autogen/xbar_peri.hjson
@@ -0,0 +1,77 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +// xbar_peri comportable IP spec generated by `tlgen.py` tool +{ name: "xbar_peri" + clock_primary: "" + other_clock_list: [] + reset_primary: "" + other_reset_list: [] + //available_input_list: [] + + inter_signal_list: [ + // host + { struct: "tl" + type: "req_rsp" + name: "tl_main" + act: "rsp" + package: "tlul_pkg" + } + // device + { struct: "tl" + type: "req_rsp" + name: "tl_uart" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_gpio" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_spi_device" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_rv_timer" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_usbdev" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_pwrmgr" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_rstmgr" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_clkmgr" + act: "req" + package: "tlul_pkg" + } + { struct: "tl" + type: "req_rsp" + name: "tl_ram_ret" + act: "req" + package: "tlul_pkg" + } + ] +}
diff --git a/hw/top_earlgrey/ip/xbar_peri/rtl/autogen/xbar_peri.core b/hw/top_earlgrey/ip/xbar_peri/xbar_peri.core similarity index 87% rename from hw/top_earlgrey/ip/xbar_peri/rtl/autogen/xbar_peri.core rename to hw/top_earlgrey/ip/xbar_peri/xbar_peri.core index fd455a5..71b9171 100644 --- a/hw/top_earlgrey/ip/xbar_peri/rtl/autogen/xbar_peri.core +++ b/hw/top_earlgrey/ip/xbar_peri/xbar_peri.core
@@ -12,8 +12,8 @@ depend: - lowrisc:ip:tlul files: - - tl_peri_pkg.sv - - xbar_peri.sv + - rtl/autogen/tl_peri_pkg.sv + - rtl/autogen/xbar_peri.sv file_type: systemVerilogSource