| commit | 45121fcd36aa3e29e086e2a05acf70a564a8e635 | [log] [tgz] |
|---|---|---|
| author | Alexander Williams <awill@google.com> | Wed Jun 29 16:37:48 2022 -0700 |
| committer | Alex Williams <a-will@users.noreply.github.com> | Fri Jul 08 14:08:42 2022 -0700 |
| tree | 6851778ae11da5f59ec4b1ccbd24afca70a129df | |
| parent | 1529c7e02b9bfa10bc30115ca88b1caef4117b70 [diff] |
[top] Separate JTAG from SPIDEV on CW310 Align ASIC and CW310 JTAG pins on the pinmux. Move the VBUS sense pin for usbdev to IOC7, since IOR0 is used by JTAG. This commit connects CW310's JTAG header to the JTAG pins on IOR0-IOR4. Note that TRST_N is only available on the 20-pin header. Signed-off-by: Alexander Williams <awill@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING and our documentation on project organization and processes for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).