| commit | 40ba9daefe8726641547990503142fcd752cd2f2 | [log] [tgz] |
|---|---|---|
| author | Jes B. Klinke <jbk@chromium.org> | Mon Jun 13 04:52:52 2022 -0700 |
| committer | cfrantz <frantzcj+github@gmail.com> | Thu Sep 15 13:03:03 2022 -0700 |
| tree | 37920d145b6c428d2e0ee65176db773b8613c4b0 | |
| parent | 6f7094c7b1fc37b0a1955a04d3c259aab86d50c5 [diff] |
[opentitantool] Add transport subcommand UltraDebug and the CW310 Atmel chip both have firmware that hard-codes the functionality of reset, uart, and all other pins, and are therefore ready for operation upon powering on. HyperDebug on the other hand, is not hard-coded for any OpenTitan pin assignments, and all its ports default to high-impedance. Hence, it needs some initialization to be told among other things that the reset pin should be open-drain with pullup, defaulting high, and the boot0 pins should be push-pull defaulting to a low level. These pin configurations and defaults are generally declared in configuration files. OpenTitan tool cannot blindly apply these defaults at every invocation, as it would override any previous pin manipulation in the session. This PR introduces a new command `transport init`, meant to explicitly tell the OpenTitan tool to configure all pins according to the configuration, and set their level to the default (discarding any previously set levels). I have create the `transport` top-level command with the intent that HyperDebug or other transports may have some special features that do not fit well into any generic trait, and we could add a channel for sending arbitrary instructions to the transport, without OpenTitan tool understanding those instructions. HyperDebug for instance already has a textual command line interface, if it had a command for setting e.g. the slope control on I2C or SPI lines, then OpenTitan tool could be fitted with a `transport passthrough` command, allowing the sending of a text string verbatim to the transport for processing. Signed-off-by: Jes B. Klinke <jbk@chromium.org> Change-Id: Ifd004b024a087beb91ae57268a87d02063af8e85
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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