commit | 3ff4287a86b120d9effe1ae4c250a9e04b7f49fa | [log] [tgz] |
---|---|---|
author | Mark Branstad <mark.branstad@wdc.com> | Tue Dec 15 15:18:28 2020 -0800 |
committer | Michael Schaffner <msf@google.com> | Mon Dec 28 18:01:10 2020 -0800 |
tree | af52a77a66eb71c7e5b23d9dc270ce6ca79991d1 | |
parent | 72b8635bd8d06d66bb164a82f7b1f4bcef5e5d6c [diff] |
[csrng/rtl] internal state observed from TLUL register This debug feature is enabled with lc_hw_debug. Gated off the read reg with enable so that x's do not propagate. Cleaned up internal state field description and dump regs. Added more clean up to text descriptions, and long lines. Added the feature to reset the internal state ptr on reg write. Added an enable for all FIFO errors. Added onehot asserts and include file. Added more rewording of text based on reviews. Signed-off-by: Mark Branstad <mark.branstad@wdc.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).