| commit | 3f70f2540eaf3dd2ced3bf5f1468c833097d1be0 | [log] [tgz] |
|---|---|---|
| author | Rupert Swarbrick <rswarbrick@lowrisc.org> | Mon Mar 07 07:56:04 2022 +0000 |
| committer | Rupert Swarbrick <rswarbrick@gmail.com> | Mon Mar 07 21:27:19 2022 +0000 |
| tree | 66c9256c72cbe0b8200db5087caad4cef613b01a | |
| parent | f82a5cafdbe4543b569c75158938459269fa9656 [diff] |
[dv,jtag] Fix casting in jtag_riscv_monitor This triggered some warnings in Xcelium (because we were assigning raw bits to an enum type without an explicit cast). Add explicit casting and an auxiliary "raw" variable to make it clear which bits use the cast (now always inside a branch where we know the value is good, or just used for debug prints). Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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