[dv] reorg alert_handler bing & add CSR asserts
Signed-off-by: Srikrishna Iyer <sriyer@google.com>
diff --git a/hw/ip/alert_handler/dv/alert_handler_generic_sim.core b/hw/ip/alert_handler/dv/alert_handler_generic_sim.core
index 399b790..bfa1132 100644
--- a/hw/ip/alert_handler/dv/alert_handler_generic_sim.core
+++ b/hw/ip/alert_handler/dv/alert_handler_generic_sim.core
@@ -12,7 +12,8 @@
files_dv:
depend:
- - lowrisc:dv:alert_handler_tb:0.1
+ - lowrisc:dv:alert_handler_tb
+ - lowrisc:dv:alert_handler_sva
files:
- tb/alert_handler_env_pkg__params.sv: {is_include_file: true}
file_type: systemVerilogSource
diff --git a/hw/ip/alert_handler/dv/sva/alert_handler_bind.sv b/hw/ip/alert_handler/dv/sva/alert_handler_bind.sv
new file mode 100644
index 0000000..985ed92
--- /dev/null
+++ b/hw/ip/alert_handler/dv/sva/alert_handler_bind.sv
@@ -0,0 +1,26 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+module alert_handler_bind;
+
+ bind alert_handler tlul_assert #(
+ .EndpointType("Device")
+ ) tlul_assert_device (
+ .clk_i,
+ .rst_ni,
+ .h2d (tl_i),
+ .d2h (tl_o)
+ );
+
+ // import alert_handler_reg_pkg::*;
+ // bind alert_handler alert_handler_csr_assert_fpv alert_handler_csr_assert (
+ // .clk_i,
+ // .rst_ni,
+ // .h2d (tl_i),
+ // .d2h (tl_o),
+ // .reg2hw (reg2hw),
+ // .hw2reg (hw2reg)
+ // );
+
+endmodule
diff --git a/hw/ip/alert_handler/dv/sva/alert_handler_sva.core b/hw/ip/alert_handler/dv/sva/alert_handler_sva.core
new file mode 100644
index 0000000..fb88846
--- /dev/null
+++ b/hw/ip/alert_handler/dv/sva/alert_handler_sva.core
@@ -0,0 +1,28 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:dv:alert_handler_sva:0.1"
+description: "ALERT_HANDLER assertion modules and bind file."
+filesets:
+ files_dv:
+ depend:
+ - lowrisc:tlul:headers
+ - lowrisc:fpv:csr_assert_gen
+ files:
+ - alert_handler_bind.sv
+ file_type: systemVerilogSource
+
+generate:
+ csr_assert_gen:
+ generator: csr_assert_gen
+ parameters:
+ spec: ../../data/alert_handler.hjson
+ depend: lowrisc:ip:alert_handler_reg
+
+targets:
+ default:
+ filesets:
+ - files_dv
+ generate:
+ - csr_assert_gen
diff --git a/hw/ip/alert_handler/dv/tb/alert_handler_bind.sv b/hw/ip/alert_handler/dv/tb/alert_handler_bind.sv
deleted file mode 100644
index 0876d2f..0000000
--- a/hw/ip/alert_handler/dv/tb/alert_handler_bind.sv
+++ /dev/null
@@ -1,16 +0,0 @@
-// Copyright lowRISC contributors.
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-module alert_handler_bind;
-
- bind alert_handler tlul_assert #(
- .EndpointType("Device")
- ) tlul_assert_device (
- .clk_i,
- .rst_ni,
- .h2d (tl_i),
- .d2h (tl_o)
- );
-
-endmodule
diff --git a/hw/ip/alert_handler/dv/tb/alert_handler_tb.core b/hw/ip/alert_handler/dv/tb/alert_handler_tb.core
index 472eba9..edd71ff 100644
--- a/hw/ip/alert_handler/dv/tb/alert_handler_tb.core
+++ b/hw/ip/alert_handler/dv/tb/alert_handler_tb.core
@@ -9,7 +9,6 @@
depend:
- lowrisc:dv:alert_handler_test:0.1
files:
- - alert_handler_bind.sv
- tb.sv
file_type: systemVerilogSource
diff --git a/hw/top_earlgrey/ip/alert_handler/dv/alert_handler_sim.core b/hw/top_earlgrey/ip/alert_handler/dv/alert_handler_sim.core
index 606ef85..20c7f8e 100644
--- a/hw/top_earlgrey/ip/alert_handler/dv/alert_handler_sim.core
+++ b/hw/top_earlgrey/ip/alert_handler/dv/alert_handler_sim.core
@@ -13,7 +13,8 @@
files_dv:
depend:
- - lowrisc:dv:alert_handler_tb:0.1
+ - lowrisc:dv:alert_handler_tb
+ - lowrisc:top_earlgrey:alert_handler_sva
files:
- alert_handler_env_pkg__params.sv: {is_include_file: true}
file_type: systemVerilogSource
diff --git a/hw/top_earlgrey/ip/alert_handler/dv/sva/alert_handler_bind.sv b/hw/top_earlgrey/ip/alert_handler/dv/sva/alert_handler_bind.sv
new file mode 120000
index 0000000..933d1ea
--- /dev/null
+++ b/hw/top_earlgrey/ip/alert_handler/dv/sva/alert_handler_bind.sv
@@ -0,0 +1 @@
+../../../../../ip/alert_handler/dv/sva/alert_handler_bind.sv
\ No newline at end of file
diff --git a/hw/top_earlgrey/ip/alert_handler/dv/sva/alert_handler_sva.core b/hw/top_earlgrey/ip/alert_handler/dv/sva/alert_handler_sva.core
new file mode 100644
index 0000000..31db77f
--- /dev/null
+++ b/hw/top_earlgrey/ip/alert_handler/dv/sva/alert_handler_sva.core
@@ -0,0 +1,29 @@
+CAPI=2:
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:top_earlgrey:alert_handler_sva:0.1"
+description: "ALERT_HANDLER assertion modules and bind file."
+filesets:
+ files_dv:
+ depend:
+ - lowrisc:tlul:headers
+ - lowrisc:fpv:csr_assert_gen
+ files:
+ - alert_handler_bind.sv
+ file_type: systemVerilogSource
+
+# TODO: This only caters to top_earlgrey chip specific assertions.
+generate:
+ csr_assert_gen:
+ generator: csr_assert_gen
+ parameters:
+ spec: ../../data/autogen/alert_handler.hjson
+ depend: lowrisc:top_earlgrey:alert_handler_reg
+
+targets:
+ default:
+ filesets:
+ - files_dv
+ generate:
+ - csr_assert_gen