| commit | 3ceee63f31edac5cc4414c83891d2eb5be3d8f17 | [log] [tgz] |
|---|---|---|
| author | Rupert Swarbrick <rswarbrick@lowrisc.org> | Wed Mar 10 16:28:15 2021 +0000 |
| committer | Rupert Swarbrick <rswarbrick@gmail.com> | Sun Apr 18 16:35:44 2021 +0100 |
| tree | 1110f4f5a4d3c15bb026652104ee24a83f53f5db | |
| parent | 55cf024a785aabc2fa8977aea36a3097495c22d3 [diff] |
[rom_ctrl] Initial design RTL for the ROM checker This has the counter FSM to read from ROM, the mux to arbitrate between the checker and bus access, and a "compare" block to check against expected outputs. The checks that run at the start of time are all disabled by default (because of the SkipCheck parameter). This means that we can integrate this code with the top-level and teach pwrmgr to sequence things properly before turning on the check. This commit does not yet contain ROM scrambling (which will need a bit more tooling work). Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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