[top/pinout] Update pinout to newest version for Silver Signed-off-by: Michael Schaffner <msf@google.com>
diff --git a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv index 7f70786..1bff316 100644 --- a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv +++ b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv
@@ -34,6 +34,7 @@ inout FLASH_TEST_MODE3, // Manual Pad inout FLASH_TEST_VOLT, // Manual Pad inout IOR8, // Dedicated Pad for sysrst_ctrl_aon_ec_rst_out_l + inout IOR9, // Dedicated Pad for sysrst_ctrl_aon_pwrb_out // Muxed Pads inout IOA0, // MIO Pad 0 @@ -42,43 +43,47 @@ inout IOA3, // MIO Pad 3 inout IOA4, // MIO Pad 4 inout IOA5, // MIO Pad 5 - inout IOB0, // MIO Pad 6 - inout IOB1, // MIO Pad 7 - inout IOB2, // MIO Pad 8 - inout IOB3, // MIO Pad 9 - inout IOB4, // MIO Pad 10 - inout IOB5, // MIO Pad 11 - inout IOB6, // MIO Pad 12 - inout IOB7, // MIO Pad 13 - inout IOB8, // MIO Pad 14 - inout IOB9, // MIO Pad 15 - inout IOB10, // MIO Pad 16 - inout IOB11, // MIO Pad 17 - inout IOC0, // MIO Pad 18 - inout IOC1, // MIO Pad 19 - inout IOC2, // MIO Pad 20 - inout IOC3, // MIO Pad 21 - inout IOC4, // MIO Pad 22 - inout IOC5, // MIO Pad 23 - inout IOC6, // MIO Pad 24 - inout IOC7, // MIO Pad 25 - inout IOC8, // MIO Pad 26 - inout IOC9, // MIO Pad 27 - inout IOC10, // MIO Pad 28 - inout IOC11, // MIO Pad 29 - inout IOR0, // MIO Pad 30 - inout IOR1, // MIO Pad 31 - inout IOR2, // MIO Pad 32 - inout IOR3, // MIO Pad 33 - inout IOR4, // MIO Pad 34 - inout IOR5, // MIO Pad 35 - inout IOR6, // MIO Pad 36 - inout IOR7, // MIO Pad 37 - inout IOR9, // MIO Pad 38 - inout IOR10, // MIO Pad 39 - inout IOR11, // MIO Pad 40 - inout IOR12, // MIO Pad 41 - inout IOR13 // MIO Pad 42 + inout IOA6, // MIO Pad 6 + inout IOA7, // MIO Pad 7 + inout IOA8, // MIO Pad 8 + inout IOB0, // MIO Pad 9 + inout IOB1, // MIO Pad 10 + inout IOB2, // MIO Pad 11 + inout IOB3, // MIO Pad 12 + inout IOB4, // MIO Pad 13 + inout IOB5, // MIO Pad 14 + inout IOB6, // MIO Pad 15 + inout IOB7, // MIO Pad 16 + inout IOB8, // MIO Pad 17 + inout IOB9, // MIO Pad 18 + inout IOB10, // MIO Pad 19 + inout IOB11, // MIO Pad 20 + inout IOB12, // MIO Pad 21 + inout IOC0, // MIO Pad 22 + inout IOC1, // MIO Pad 23 + inout IOC2, // MIO Pad 24 + inout IOC3, // MIO Pad 25 + inout IOC4, // MIO Pad 26 + inout IOC5, // MIO Pad 27 + inout IOC6, // MIO Pad 28 + inout IOC7, // MIO Pad 29 + inout IOC8, // MIO Pad 30 + inout IOC9, // MIO Pad 31 + inout IOC10, // MIO Pad 32 + inout IOC11, // MIO Pad 33 + inout IOC12, // MIO Pad 34 + inout IOR0, // MIO Pad 35 + inout IOR1, // MIO Pad 36 + inout IOR2, // MIO Pad 37 + inout IOR3, // MIO Pad 38 + inout IOR4, // MIO Pad 39 + inout IOR5, // MIO Pad 40 + inout IOR6, // MIO Pad 41 + inout IOR7, // MIO Pad 42 + inout IOR10, // MIO Pad 43 + inout IOR11, // MIO Pad 44 + inout IOR12, // MIO Pad 45 + inout IOR13 // MIO Pad 46 ); import top_earlgrey_pkg::*; @@ -88,15 +93,15 @@ // Special Signal Indices // //////////////////////////// - parameter int Tap0PadIdx = 26; - parameter int Tap1PadIdx = 23; - parameter int Dft0PadIdx = 21; - parameter int Dft1PadIdx = 22; - parameter int TckPadIdx = 54; - parameter int TmsPadIdx = 55; - parameter int TrstNPadIdx = 18; - parameter int TdiPadIdx = 47; - parameter int TdoPadIdx = 48; + parameter int Tap0PadIdx = 30; + parameter int Tap1PadIdx = 27; + parameter int Dft0PadIdx = 25; + parameter int Dft1PadIdx = 26; + parameter int TckPadIdx = 38; + parameter int TmsPadIdx = 35; + parameter int TrstNPadIdx = 39; + parameter int TdiPadIdx = 37; + parameter int TdoPadIdx = 36; // TODO: this is temporary and will be removed in the future. // This specifies the tie-off values of the muxed MIO/DIOs @@ -173,12 +178,13 @@ padring #( // Padring specific counts may differ from pinmux config due // to custom, stubbed or added pads. - .NDioPads(23), - .NMioPads(43), + .NDioPads(24), + .NMioPads(47), // TODO: need to add ScanRole parameters .PhysicalPads(1), .NIoBanks(IoBankCount), .DioPadBank ({ + IoBankVcc, // IOR9 IoBankVcc, // IOR8 IoBankVcc, // FLASH_TEST_VOLT IoBankVcc, // FLASH_TEST_MODE3 @@ -208,7 +214,6 @@ IoBankVcc, // IOR12 IoBankVcc, // IOR11 IoBankVcc, // IOR10 - IoBankVcc, // IOR9 IoBankVcc, // IOR7 IoBankVcc, // IOR6 IoBankVcc, // IOR5 @@ -217,6 +222,7 @@ IoBankVcc, // IOR2 IoBankVcc, // IOR1 IoBankVcc, // IOR0 + IoBankVcc, // IOC12 IoBankVcc, // IOC11 IoBankVcc, // IOC10 IoBankVcc, // IOC9 @@ -229,6 +235,7 @@ IoBankVcc, // IOC2 IoBankVcc, // IOC1 IoBankVcc, // IOC0 + IoBankViob, // IOB12 IoBankViob, // IOB11 IoBankViob, // IOB10 IoBankViob, // IOB9 @@ -241,6 +248,9 @@ IoBankViob, // IOB2 IoBankViob, // IOB1 IoBankViob, // IOB0 + IoBankVioa, // IOA8 + IoBankVioa, // IOA7 + IoBankVioa, // IOA6 IoBankVioa, // IOA5 IoBankVioa, // IOA4 IoBankVioa, // IOA3 @@ -249,6 +259,7 @@ IoBankVioa // IOA0 }), .DioPadType ({ + BidirOd, // IOR9 BidirOd, // IOR8 InputStd, // FLASH_TEST_VOLT InputStd, // FLASH_TEST_MODE3 @@ -278,45 +289,49 @@ BidirOd, // IOR12 BidirOd, // IOR11 BidirOd, // IOR10 - BidirOd, // IOR9 - InputStd, // IOR7 - InputStd, // IOR6 - InputStd, // IOR5 - InputStd, // IOR4 - InputStd, // IOR3 - InputStd, // IOR2 - InputStd, // IOR1 - InputStd, // IOR0 + BidirStd, // IOR7 + BidirStd, // IOR6 + BidirStd, // IOR5 + BidirStd, // IOR4 + BidirStd, // IOR3 + BidirStd, // IOR2 + BidirStd, // IOR1 + BidirStd, // IOR0 + BidirOd, // IOC12 BidirOd, // IOC11 BidirOd, // IOC10 - BidirOd, // IOC9 - BidirOd, // IOC8 - InputStd, // IOC7 - InputStd, // IOC6 - InputStd, // IOC5 - InputStd, // IOC4 - InputStd, // IOC3 - InputStd, // IOC2 - InputStd, // IOC1 - InputStd, // IOC0 - InputStd, // IOB11 - InputStd, // IOB10 + BidirStd, // IOC9 + BidirStd, // IOC8 + BidirStd, // IOC7 + BidirStd, // IOC6 + BidirStd, // IOC5 + BidirStd, // IOC4 + BidirStd, // IOC3 + BidirStd, // IOC2 + BidirStd, // IOC1 + BidirStd, // IOC0 + BidirOd, // IOB12 + BidirOd, // IOB11 + BidirOd, // IOB10 BidirOd, // IOB9 - BidirOd, // IOB8 - InputStd, // IOB7 - InputStd, // IOB6 - InputStd, // IOB5 - InputStd, // IOB4 - InputStd, // IOB3 - InputStd, // IOB2 - InputStd, // IOB1 - InputStd, // IOB0 - BidirOd, // IOA5 - BidirOd, // IOA4 - InputStd, // IOA3 - InputStd, // IOA2 - InputStd, // IOA1 - InputStd // IOA0 + BidirStd, // IOB8 + BidirStd, // IOB7 + BidirStd, // IOB6 + BidirStd, // IOB5 + BidirStd, // IOB4 + BidirStd, // IOB3 + BidirStd, // IOB2 + BidirStd, // IOB1 + BidirStd, // IOB0 + BidirOd, // IOA8 + BidirOd, // IOA7 + BidirOd, // IOA6 + BidirStd, // IOA5 + BidirStd, // IOA4 + BidirStd, // IOA3 + BidirStd, // IOA2 + BidirStd, // IOA1 + BidirStd // IOA0 }) ) u_padring ( // This is only used for scan and DFT purposes @@ -328,6 +343,7 @@ .mio_in_raw_o ( ), // Chip IOs .dio_pad_io ({ + IOR9, IOR8, FLASH_TEST_VOLT, FLASH_TEST_MODE3, @@ -358,7 +374,6 @@ IOR12, IOR11, IOR10, - IOR9, IOR7, IOR6, IOR5, @@ -367,6 +382,7 @@ IOR2, IOR1, IOR0, + IOC12, IOC11, IOC10, IOC9, @@ -379,6 +395,7 @@ IOC2, IOC1, IOC0, + IOB12, IOB11, IOB10, IOB9, @@ -391,6 +408,9 @@ IOB2, IOB1, IOB0, + IOA8, + IOA7, + IOA6, IOA5, IOA4, IOA3, @@ -401,6 +421,7 @@ // Core-facing .dio_in_o ({ + dio_in[DioSysrstCtrlAonPwrbOut], dio_in[DioSysrstCtrlAonEcRstOutL], manual_in_flash_test_volt, manual_in_flash_test_mode3, @@ -426,6 +447,7 @@ manual_in_por_n }), .dio_out_i ({ + dio_out[DioSysrstCtrlAonPwrbOut], dio_out[DioSysrstCtrlAonEcRstOutL], manual_out_flash_test_volt, manual_out_flash_test_mode3, @@ -451,6 +473,7 @@ manual_out_por_n }), .dio_oe_i ({ + dio_oe[DioSysrstCtrlAonPwrbOut], dio_oe[DioSysrstCtrlAonEcRstOutL], manual_oe_flash_test_volt, manual_oe_flash_test_mode3, @@ -476,6 +499,7 @@ manual_oe_por_n }), .dio_attr_i ({ + dio_attr[DioSysrstCtrlAonPwrbOut], dio_attr[DioSysrstCtrlAonEcRstOutL], manual_attr_flash_test_volt, manual_attr_flash_test_mode3, @@ -502,6 +526,10 @@ }), .mio_in_o ({ + mio_in[46], + mio_in[45], + mio_in[44], + mio_in[43], mio_in[42], mio_in[41], mio_in[40], @@ -547,6 +575,10 @@ mio_in[0] }), .mio_out_i ({ + mio_out[46], + mio_out[45], + mio_out[44], + mio_out[43], mio_out[42], mio_out[41], mio_out[40], @@ -592,6 +624,10 @@ mio_out[0] }), .mio_oe_i ({ + mio_oe[46], + mio_oe[45], + mio_oe[44], + mio_oe[43], mio_oe[42], mio_oe[41], mio_oe[40], @@ -637,6 +673,10 @@ mio_oe[0] }), .mio_attr_i ({ + mio_attr[46], + mio_attr[45], + mio_attr[44], + mio_attr[43], mio_attr[42], mio_attr[41], mio_attr[40],
diff --git a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_nexysvideo.sv b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_nexysvideo.sv index 9e5a49d..98f3667 100644 --- a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_nexysvideo.sv +++ b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_nexysvideo.sv
@@ -46,29 +46,29 @@ inout IOA3, // MIO Pad 3 inout IOA4, // MIO Pad 4 inout IOA5, // MIO Pad 5 - inout IOB0, // MIO Pad 6 - inout IOB1, // MIO Pad 7 - inout IOB2, // MIO Pad 8 - inout IOB3, // MIO Pad 9 - inout IOB4, // MIO Pad 10 - inout IOB5, // MIO Pad 11 - inout IOB6, // MIO Pad 12 - inout IOB7, // MIO Pad 13 - inout IOB8, // MIO Pad 14 - inout IOB9, // MIO Pad 15 - inout IOB10, // MIO Pad 16 - inout IOB11, // MIO Pad 17 - inout IOC0, // MIO Pad 18 - inout IOC6, // MIO Pad 24 - inout IOC7, // MIO Pad 25 - inout IOC8, // MIO Pad 26 - inout IOC9, // MIO Pad 27 - inout IOC10, // MIO Pad 28 - inout IOC11, // MIO Pad 29 - inout IOR0, // MIO Pad 30 - inout IOR1, // MIO Pad 31 - inout IOR2, // MIO Pad 32 - inout IOR3 // MIO Pad 33 + inout IOA6, // MIO Pad 6 + inout IOA7, // MIO Pad 7 + inout IOA8, // MIO Pad 8 + inout IOB0, // MIO Pad 9 + inout IOB1, // MIO Pad 10 + inout IOB2, // MIO Pad 11 + inout IOB3, // MIO Pad 12 + inout IOB4, // MIO Pad 13 + inout IOB5, // MIO Pad 14 + inout IOB6, // MIO Pad 15 + inout IOB7, // MIO Pad 16 + inout IOB8, // MIO Pad 17 + inout IOB9, // MIO Pad 18 + inout IOC2, // MIO Pad 24 + inout IOC3, // MIO Pad 25 + inout IOC4, // MIO Pad 26 + inout IOC5, // MIO Pad 27 + inout IOC6, // MIO Pad 28 + inout IOC7, // MIO Pad 29 + inout IOC8, // MIO Pad 30 + inout IOC9, // MIO Pad 31 + inout IOC10, // MIO Pad 32 + inout IOC11 // MIO Pad 33 ); import top_earlgrey_pkg::*; @@ -78,15 +78,15 @@ // Special Signal Indices // //////////////////////////// - parameter int Tap0PadIdx = 20; + parameter int Tap0PadIdx = 22; parameter int Tap1PadIdx = 16; - parameter int Dft0PadIdx = 21; - parameter int Dft1PadIdx = 22; - parameter int TckPadIdx = 54; - parameter int TmsPadIdx = 55; + parameter int Dft0PadIdx = 23; + parameter int Dft1PadIdx = 34; + parameter int TckPadIdx = 58; + parameter int TmsPadIdx = 59; parameter int TrstNPadIdx = 18; - parameter int TdiPadIdx = 47; - parameter int TdoPadIdx = 48; + parameter int TdiPadIdx = 51; + parameter int TdoPadIdx = 52; // TODO: this is temporary and will be removed in the future. // This specifies the tie-off values of the muxed MIO/DIOs @@ -167,7 +167,7 @@ ///////////////////////// // Only signals going to non-custom pads need to be tied off. - logic [65:0] unused_sig; + logic [70:0] unused_sig; assign dio_in[DioSpiHost0Sd0] = 1'b0; assign unused_sig[1] = dio_out[DioSpiHost0Sd0] ^ dio_oe[DioSpiHost0Sd0]; assign dio_in[DioSpiHost0Sd1] = 1'b0; @@ -202,18 +202,28 @@ assign unused_sig[58] = mio_out[36] ^ mio_oe[36]; assign mio_in[37] = 1'b0; assign unused_sig[59] = mio_out[37] ^ mio_oe[37]; - assign dio_in[DioSysrstCtrlAonEcRstOutL] = 1'b0; - assign unused_sig[60] = dio_out[DioSysrstCtrlAonEcRstOutL] ^ dio_oe[DioSysrstCtrlAonEcRstOutL]; assign mio_in[38] = 1'b0; - assign unused_sig[61] = mio_out[38] ^ mio_oe[38]; + assign unused_sig[60] = mio_out[38] ^ mio_oe[38]; assign mio_in[39] = 1'b0; - assign unused_sig[62] = mio_out[39] ^ mio_oe[39]; + assign unused_sig[61] = mio_out[39] ^ mio_oe[39]; assign mio_in[40] = 1'b0; - assign unused_sig[63] = mio_out[40] ^ mio_oe[40]; + assign unused_sig[62] = mio_out[40] ^ mio_oe[40]; assign mio_in[41] = 1'b0; - assign unused_sig[64] = mio_out[41] ^ mio_oe[41]; + assign unused_sig[63] = mio_out[41] ^ mio_oe[41]; assign mio_in[42] = 1'b0; - assign unused_sig[65] = mio_out[42] ^ mio_oe[42]; + assign unused_sig[64] = mio_out[42] ^ mio_oe[42]; + assign dio_in[DioSysrstCtrlAonEcRstOutL] = 1'b0; + assign unused_sig[65] = dio_out[DioSysrstCtrlAonEcRstOutL] ^ dio_oe[DioSysrstCtrlAonEcRstOutL]; + assign dio_in[DioSysrstCtrlAonPwrbOut] = 1'b0; + assign unused_sig[66] = dio_out[DioSysrstCtrlAonPwrbOut] ^ dio_oe[DioSysrstCtrlAonPwrbOut]; + assign mio_in[43] = 1'b0; + assign unused_sig[67] = mio_out[43] ^ mio_oe[43]; + assign mio_in[44] = 1'b0; + assign unused_sig[68] = mio_out[44] ^ mio_oe[44]; + assign mio_in[45] = 1'b0; + assign unused_sig[69] = mio_out[45] ^ mio_oe[45]; + assign mio_in[46] = 1'b0; + assign unused_sig[70] = mio_out[46] ^ mio_oe[46]; ////////////////////// // Padring Instance // @@ -248,35 +258,35 @@ InputStd // POR_N }), .MioPadType ({ - InputStd, // IOR3 - InputStd, // IOR2 - InputStd, // IOR1 - InputStd, // IOR0 BidirOd, // IOC11 BidirOd, // IOC10 - BidirOd, // IOC9 - BidirOd, // IOC8 - InputStd, // IOC7 - InputStd, // IOC6 - InputStd, // IOC0 - InputStd, // IOB11 - InputStd, // IOB10 + BidirStd, // IOC9 + BidirStd, // IOC8 + BidirStd, // IOC7 + BidirStd, // IOC6 + BidirStd, // IOC5 + BidirStd, // IOC4 + BidirStd, // IOC3 + BidirStd, // IOC2 BidirOd, // IOB9 - BidirOd, // IOB8 - InputStd, // IOB7 - InputStd, // IOB6 - InputStd, // IOB5 - InputStd, // IOB4 - InputStd, // IOB3 - InputStd, // IOB2 - InputStd, // IOB1 - InputStd, // IOB0 - BidirOd, // IOA5 - BidirOd, // IOA4 - InputStd, // IOA3 - InputStd, // IOA2 - InputStd, // IOA1 - InputStd // IOA0 + BidirStd, // IOB8 + BidirStd, // IOB7 + BidirStd, // IOB6 + BidirStd, // IOB5 + BidirStd, // IOB4 + BidirStd, // IOB3 + BidirStd, // IOB2 + BidirStd, // IOB1 + BidirStd, // IOB0 + BidirOd, // IOA8 + BidirOd, // IOA7 + BidirOd, // IOA6 + BidirStd, // IOA5 + BidirStd, // IOA4 + BidirStd, // IOA3 + BidirStd, // IOA2 + BidirStd, // IOA1 + BidirStd // IOA0 }) ) u_padring ( // This is only used for scan and DFT purposes @@ -311,19 +321,16 @@ }), .mio_pad_io ({ - IOR3, - IOR2, - IOR1, - IOR0, IOC11, IOC10, IOC9, IOC8, IOC7, IOC6, - IOC0, - IOB11, - IOB10, + IOC5, + IOC4, + IOC3, + IOC2, IOB9, IOB8, IOB7, @@ -334,6 +341,9 @@ IOB2, IOB1, IOB0, + IOA8, + IOA7, + IOA6, IOA5, IOA4, IOA3,
diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv index 3d2a58b..9785357 100644 --- a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv +++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
@@ -35,13 +35,13 @@ input rst_ni, // Multiplexed I/O - input [42:0] mio_in_i, - output logic [42:0] mio_out_o, - output logic [42:0] mio_oe_o, + input [46:0] mio_in_i, + output logic [46:0] mio_out_o, + output logic [46:0] mio_oe_o, // Dedicated I/O - input [21:0] dio_in_i, - output logic [21:0] dio_out_o, - output logic [21:0] dio_oe_o, + input [22:0] dio_in_i, + output logic [22:0] dio_out_o, + output logic [22:0] dio_oe_o, // pad attributes to padring output prim_pad_wrapper_pkg::pad_attr_t [pinmux_reg_pkg::NMioPads-1:0] mio_attr_o, @@ -117,11 +117,11 @@ // Signals logic [64:0] mio_p2d; - logic [67:0] mio_d2p; - logic [67:0] mio_en_d2p; - logic [21:0] dio_p2d; - logic [21:0] dio_d2p; - logic [21:0] dio_en_d2p; + logic [66:0] mio_d2p; + logic [66:0] mio_en_d2p; + logic [22:0] dio_p2d; + logic [22:0] dio_d2p; + logic [22:0] dio_en_d2p; // uart0 logic cio_uart0_rx_p2d; logic cio_uart0_tx_d2p; @@ -2776,7 +2776,6 @@ assign mio_d2p[MioOutSysrstCtrlAonKey0Out] = cio_sysrst_ctrl_aon_key0_out_d2p; assign mio_d2p[MioOutSysrstCtrlAonKey1Out] = cio_sysrst_ctrl_aon_key1_out_d2p; assign mio_d2p[MioOutSysrstCtrlAonKey2Out] = cio_sysrst_ctrl_aon_key2_out_d2p; - assign mio_d2p[MioOutSysrstCtrlAonPwrbOut] = cio_sysrst_ctrl_aon_pwrb_out_d2p; // All muxed output enables assign mio_en_d2p[MioOutGpioGpio0] = cio_gpio_gpio_en_d2p[0]; @@ -2846,10 +2845,9 @@ assign mio_en_d2p[MioOutSysrstCtrlAonKey0Out] = cio_sysrst_ctrl_aon_key0_out_en_d2p; assign mio_en_d2p[MioOutSysrstCtrlAonKey1Out] = cio_sysrst_ctrl_aon_key1_out_en_d2p; assign mio_en_d2p[MioOutSysrstCtrlAonKey2Out] = cio_sysrst_ctrl_aon_key2_out_en_d2p; - assign mio_en_d2p[MioOutSysrstCtrlAonPwrbOut] = cio_sysrst_ctrl_aon_pwrb_out_en_d2p; // All dedicated inputs - logic [21:0] unused_dio_p2d; + logic [22:0] unused_dio_p2d; assign cio_spi_host0_sd_p2d[0] = dio_p2d[DioSpiHost0Sd0]; assign cio_spi_host0_sd_p2d[1] = dio_p2d[DioSpiHost0Sd1]; assign cio_spi_host0_sd_p2d[2] = dio_p2d[DioSpiHost0Sd2]; @@ -2872,6 +2870,7 @@ assign unused_dio_p2d[5] = dio_p2d[DioUsbdevTxModeSe]; assign unused_dio_p2d[6] = dio_p2d[DioUsbdevSuspend]; assign unused_dio_p2d[7] = dio_p2d[DioSysrstCtrlAonEcRstOutL]; + assign unused_dio_p2d[8] = dio_p2d[DioSysrstCtrlAonPwrbOut]; // All dedicated outputs assign dio_d2p[DioSpiHost0Sd0] = cio_spi_host0_sd_d2p[0]; @@ -2896,6 +2895,7 @@ assign dio_d2p[DioUsbdevTxModeSe] = cio_usbdev_tx_mode_se_d2p; assign dio_d2p[DioUsbdevSuspend] = cio_usbdev_suspend_d2p; assign dio_d2p[DioSysrstCtrlAonEcRstOutL] = cio_sysrst_ctrl_aon_ec_rst_out_l_d2p; + assign dio_d2p[DioSysrstCtrlAonPwrbOut] = cio_sysrst_ctrl_aon_pwrb_out_d2p; // All dedicated output enables assign dio_en_d2p[DioSpiHost0Sd0] = cio_spi_host0_sd_en_d2p[0]; @@ -2920,6 +2920,7 @@ assign dio_en_d2p[DioUsbdevTxModeSe] = cio_usbdev_tx_mode_se_en_d2p; assign dio_en_d2p[DioUsbdevSuspend] = cio_usbdev_suspend_en_d2p; assign dio_en_d2p[DioSysrstCtrlAonEcRstOutL] = cio_sysrst_ctrl_aon_ec_rst_out_l_en_d2p; + assign dio_en_d2p[DioSysrstCtrlAonPwrbOut] = cio_sysrst_ctrl_aon_pwrb_out_en_d2p; // make sure scanmode_i is never X (including during reset)
diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv index db8ec70..067b5e6 100644 --- a/hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv +++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv
@@ -609,8 +609,7 @@ MioOutSysrstCtrlAonKey0Out = 64, MioOutSysrstCtrlAonKey1Out = 65, MioOutSysrstCtrlAonKey2Out = 66, - MioOutSysrstCtrlAonPwrbOut = 67, - MioOutCount = 68 + MioOutCount = 67 } mio_out_e; // Enumeration for DIO signals, used on both the top and chip-levels. @@ -637,7 +636,8 @@ DioUsbdevTxModeSe = 19, DioUsbdevSuspend = 20, DioSysrstCtrlAonEcRstOutL = 21, - DioCount = 22 + DioSysrstCtrlAonPwrbOut = 22, + DioCount = 23 } dio_e; // Raw MIO/DIO input array indices on chip-level. @@ -650,43 +650,47 @@ MioPadIoa3 = 3, MioPadIoa4 = 4, MioPadIoa5 = 5, - MioPadIob0 = 6, - MioPadIob1 = 7, - MioPadIob2 = 8, - MioPadIob3 = 9, - MioPadIob4 = 10, - MioPadIob5 = 11, - MioPadIob6 = 12, - MioPadIob7 = 13, - MioPadIob8 = 14, - MioPadIob9 = 15, - MioPadIob10 = 16, - MioPadIob11 = 17, - MioPadIoc0 = 18, - MioPadIoc1 = 19, - MioPadIoc2 = 20, - MioPadIoc3 = 21, - MioPadIoc4 = 22, - MioPadIoc5 = 23, - MioPadIoc6 = 24, - MioPadIoc7 = 25, - MioPadIoc8 = 26, - MioPadIoc9 = 27, - MioPadIoc10 = 28, - MioPadIoc11 = 29, - MioPadIor0 = 30, - MioPadIor1 = 31, - MioPadIor2 = 32, - MioPadIor3 = 33, - MioPadIor4 = 34, - MioPadIor5 = 35, - MioPadIor6 = 36, - MioPadIor7 = 37, - MioPadIor9 = 38, - MioPadIor10 = 39, - MioPadIor11 = 40, - MioPadIor12 = 41, - MioPadIor13 = 42, + MioPadIoa6 = 6, + MioPadIoa7 = 7, + MioPadIoa8 = 8, + MioPadIob0 = 9, + MioPadIob1 = 10, + MioPadIob2 = 11, + MioPadIob3 = 12, + MioPadIob4 = 13, + MioPadIob5 = 14, + MioPadIob6 = 15, + MioPadIob7 = 16, + MioPadIob8 = 17, + MioPadIob9 = 18, + MioPadIob10 = 19, + MioPadIob11 = 20, + MioPadIob12 = 21, + MioPadIoc0 = 22, + MioPadIoc1 = 23, + MioPadIoc2 = 24, + MioPadIoc3 = 25, + MioPadIoc4 = 26, + MioPadIoc5 = 27, + MioPadIoc6 = 28, + MioPadIoc7 = 29, + MioPadIoc8 = 30, + MioPadIoc9 = 31, + MioPadIoc10 = 32, + MioPadIoc11 = 33, + MioPadIoc12 = 34, + MioPadIor0 = 35, + MioPadIor1 = 36, + MioPadIor2 = 37, + MioPadIor3 = 38, + MioPadIor4 = 39, + MioPadIor5 = 40, + MioPadIor6 = 41, + MioPadIor7 = 42, + MioPadIor10 = 43, + MioPadIor11 = 44, + MioPadIor12 = 45, + MioPadIor13 = 46, MioPadCount } mio_pad_e; @@ -714,6 +718,7 @@ DioPadFlashTestMode3 = 20, DioPadFlashTestVolt = 21, DioPadIor8 = 22, + DioPadIor9 = 23, DioPadCount } dio_pad_e;