| commit | 3aef0a3b324f194f8432b641ca8a46453c983a62 | [log] [tgz] |
|---|---|---|
| author | Timothy Trippel <ttrippel@google.com> | Wed Aug 03 23:12:56 2022 -0700 |
| committer | Timothy Trippel <5633066+timothytrippel@users.noreply.github.com> | Thu Aug 04 09:02:35 2022 -0700 |
| tree | b1139a32b414f545600e19f5b66a31cae5645135 | |
| parent | e201c9f8b554eadcc9f528fb50776ec8745bd778 [diff] |
[ci,bazel] only run short and moderate FPGA tests in CI Currently, we run all FPGA tests in CI regardless of the test timeout duration. Recently, some long tests were added that have increased CI times to the point where the CW310 FPGA test running CI stage is almost timing out. This updates CI to only run short (<1 min) and moderate (<5 min) tests. Signed-off-by: Timothy Trippel <ttrippel@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING and our documentation on project organization and processes for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).