commit 37c06884e71fc3e0386370a32555c18eac518b5b
author Greg Chadwick <gac@lowrisc.org> Wed May 13 15:16:43 2020 +0100
committer Scott Johnson <41092437+sjgitty@users.noreply.github.com> Wed May 13 08:31:13 2020 -0700
tree 991deca344a78ddc203565446dc166c2c227b4f6
parent 961a33b6872b349929ba51b5cdf5fa6f7841af25

[test] Increase timeout for pytest verilator runs

We're seeing intermittent RISC-V compliance CI failures with the 120
timeout so double it to 240.

Signed-off-by: Greg Chadwick <gac@lowrisc.org>

test/systemtest/functional_verilator_test.py

diff --git a/test/systemtest/functional_verilator_test.py b/test/systemtest/functional_verilator_test.py
index f83c5a0..4ae54d5 100644
--- a/test/systemtest/functional_verilator_test.py
+++ b/test/systemtest/functional_verilator_test.py
@@ -47,7 +47,7 @@
 
         p_sim.terminate()
 
-    @pytest.mark.timeout(120)
+    @pytest.mark.timeout(240)
     def test_execute_binary(self, sim_top_earlgrey, uart_timeout, logfile):
         """
         Executes the binary and inspects its UART for "PASS!\r\n" or "FAIL!\r\n".