commit 367024c67f28d1ab7b8ab811eda28922dab85ef4
author Michael Schaffner <msf@google.com> Tue Jul 20 19:17:17 2021 -0700
committer Michael Schaffner <msf@google.com> Wed Jul 21 19:33:59 2021 -0700
tree a6e550cdc403d76af73a507de69c7d8cfd4d587c
parent ffe8c99bae89eb97ac5a1c842ada0c96ff3dce1e

[prim_subreg_shadow] Correct write data signal usage

Signed-off-by: Michael Schaffner <msf@google.com>

hw/ip/prim/rtl/prim_subreg_shadow.sv

diff --git a/hw/ip/prim/rtl/prim_subreg_shadow.sv b/hw/ip/prim/rtl/prim_subreg_shadow.sv
index 6976419..5c4a5f8 100644
--- a/hw/ip/prim/rtl/prim_subreg_shadow.sv
+++ b/hw/ip/prim/rtl/prim_subreg_shadow.sv
@@ -100,7 +100,7 @@
     .clk_i    ( clk_i     ),
     .rst_ni   ( rst_ni    ),
     .we       ( staged_we ),
-    .wd       ( ~wd       ),
+    .wd       ( ~wr_data  ),
     .de       ( staged_de ),
     .d        ( ~d        ),
     .qe       ( staged_qe ),
@@ -144,7 +144,7 @@
     .clk_i    ( clk_i        ),
     .rst_ni   ( rst_ni       ),
     .we       ( committed_we ),
-    .wd       ( wd           ),
+    .wd       ( wr_data      ),
     .de       ( committed_de ),
     .d        ( d            ),
     .qe       ( committed_qe ),