[mask_rom] Add OTP option to enable AST and reduce AST_CFG size

Using this patch AST initialization will be skipped unless the new
OTP value AST_INIT_EN is set to true (0xA). This new value can be
used as a 'tag' to show that the AST configuration in OTP is valid.
We may eventually want to turn this into some sort of checksum.

While we are here reduce the OTP AST_CFG field size to 32 words to
match the configuration.

Updates #9296.

Signed-off-by: Michael Munday <mike.munday@lowrisc.org>
diff --git a/hw/ip/otp_ctrl/data/otp_ctrl.hjson b/hw/ip/otp_ctrl/data/otp_ctrl.hjson
index 1f65c4a..c685b99 100644
--- a/hw/ip/otp_ctrl/data/otp_ctrl.hjson
+++ b/hw/ip/otp_ctrl/data/otp_ctrl.hjson
@@ -186,13 +186,25 @@
     { name: "CreatorSwCfgAstCfgSize",
       desc: "Size of CREATOR_SW_CFG_AST_CFG",
       type: "int",
-      default: "256",
+      default: "128",
+      local: "true"
+    },
+    { name: "CreatorSwCfgAstInitEnOffset",
+      desc: "Offset of CREATOR_SW_CFG_AST_INIT_EN",
+      type: "int",
+      default: "192",
+      local: "true"
+    },
+    { name: "CreatorSwCfgAstInitEnSize",
+      desc: "Size of CREATOR_SW_CFG_AST_INIT_EN",
+      type: "int",
+      default: "4",
       local: "true"
     },
     { name: "CreatorSwCfgRomExtSkuOffset",
       desc: "Offset of CREATOR_SW_CFG_ROM_EXT_SKU",
       type: "int",
-      default: "320",
+      default: "196",
       local: "true"
     },
     { name: "CreatorSwCfgRomExtSkuSize",
@@ -204,7 +216,7 @@
     { name: "CreatorSwCfgUseSwRsaVerifyOffset",
       desc: "Offset of CREATOR_SW_CFG_USE_SW_RSA_VERIFY",
       type: "int",
-      default: "324",
+      default: "200",
       local: "true"
     },
     { name: "CreatorSwCfgUseSwRsaVerifySize",
@@ -216,7 +228,7 @@
     { name: "CreatorSwCfgKeyIsValidOffset",
       desc: "Offset of CREATOR_SW_CFG_KEY_IS_VALID",
       type: "int",
-      default: "328",
+      default: "204",
       local: "true"
     },
     { name: "CreatorSwCfgKeyIsValidSize",
diff --git a/hw/ip/otp_ctrl/data/otp_ctrl_mmap.hjson b/hw/ip/otp_ctrl/data/otp_ctrl_mmap.hjson
index c480ccd..0098c26 100644
--- a/hw/ip/otp_ctrl/data/otp_ctrl_mmap.hjson
+++ b/hw/ip/otp_ctrl/data/otp_ctrl_mmap.hjson
@@ -113,7 +113,11 @@
             items: [
                 {
                     name: "CREATOR_SW_CFG_AST_CFG",
-                    size: "256"
+                    size: "128"
+                }
+                {
+                    name: "CREATOR_SW_CFG_AST_INIT_EN",
+                    size: "4"
                 }
                 {
                     name: "CREATOR_SW_CFG_ROM_EXT_SKU",
diff --git a/hw/ip/otp_ctrl/doc/otp_ctrl_mmap.md b/hw/ip/otp_ctrl/doc/otp_ctrl_mmap.md
index 8dd643e..73fca08 100644
--- a/hw/ip/otp_ctrl/doc/otp_ctrl_mmap.md
+++ b/hw/ip/otp_ctrl/doc/otp_ctrl_mmap.md
@@ -7,10 +7,11 @@
 |:-------:|:--------------:|:----------:|:----------------:|:-----------------------------------------------------:|:--------------:|:----------:|
 |    0    |  VENDOR_TEST   |     64     |      32bit       |                        SCRATCH                        |     0x000      |     56     |
 |         |                |            |      64bit       |    [VENDOR_TEST_DIGEST](#Reg_vendor_test_digest_0)    |     0x038      |     8      |
-|    1    | CREATOR_SW_CFG |    800     |      32bit       |                CREATOR_SW_CFG_AST_CFG                 |     0x040      |    256     |
-|         |                |            |      32bit       |              CREATOR_SW_CFG_ROM_EXT_SKU               |     0x140      |     4      |
-|         |                |            |      32bit       |           CREATOR_SW_CFG_USE_SW_RSA_VERIFY            |     0x144      |     4      |
-|         |                |            |      32bit       |              CREATOR_SW_CFG_KEY_IS_VALID              |     0x148      |     8      |
+|    1    | CREATOR_SW_CFG |    800     |      32bit       |                CREATOR_SW_CFG_AST_CFG                 |     0x040      |    128     |
+|         |                |            |      32bit       |              CREATOR_SW_CFG_AST_INIT_EN               |     0x0C0      |     4      |
+|         |                |            |      32bit       |              CREATOR_SW_CFG_ROM_EXT_SKU               |     0x0C4      |     4      |
+|         |                |            |      32bit       |           CREATOR_SW_CFG_USE_SW_RSA_VERIFY            |     0x0C8      |     4      |
+|         |                |            |      32bit       |              CREATOR_SW_CFG_KEY_IS_VALID              |     0x0CC      |     8      |
 |         |                |            |      64bit       | [CREATOR_SW_CFG_DIGEST](#Reg_creator_sw_cfg_digest_0) |     0x358      |     8      |
 |    2    |  OWNER_SW_CFG  |    800     |      32bit       |                  ROM_ERROR_REPORTING                  |     0x360      |     4      |
 |         |                |            |      32bit       |                   ROM_BOOTSTRAP_EN                    |     0x364      |     4      |
diff --git a/hw/ip/otp_ctrl/rtl/otp_ctrl_part_pkg.sv b/hw/ip/otp_ctrl/rtl/otp_ctrl_part_pkg.sv
index 148c3d0..46d67ff 100644
--- a/hw/ip/otp_ctrl/rtl/otp_ctrl_part_pkg.sv
+++ b/hw/ip/otp_ctrl/rtl/otp_ctrl_part_pkg.sv
@@ -318,11 +318,12 @@
     }),
     6400'({
       64'h7D7EA64D850E128D,
-      4160'h0, // unallocated space
+      5152'h0, // unallocated space
       64'h0,
       32'h0,
       32'h0,
-      2048'h0
+      32'h0,
+      1024'h0
     }),
     512'({
       64'h1D00E175E3739EC1,
diff --git a/hw/ip/otp_ctrl/rtl/otp_ctrl_reg_pkg.sv b/hw/ip/otp_ctrl/rtl/otp_ctrl_reg_pkg.sv
index 639ffec..a399396 100644
--- a/hw/ip/otp_ctrl/rtl/otp_ctrl_reg_pkg.sv
+++ b/hw/ip/otp_ctrl/rtl/otp_ctrl_reg_pkg.sv
@@ -24,12 +24,14 @@
   parameter int CreatorSwCfgOffset = 64;
   parameter int CreatorSwCfgSize = 800;
   parameter int CreatorSwCfgAstCfgOffset = 64;
-  parameter int CreatorSwCfgAstCfgSize = 256;
-  parameter int CreatorSwCfgRomExtSkuOffset = 320;
+  parameter int CreatorSwCfgAstCfgSize = 128;
+  parameter int CreatorSwCfgAstInitEnOffset = 192;
+  parameter int CreatorSwCfgAstInitEnSize = 4;
+  parameter int CreatorSwCfgRomExtSkuOffset = 196;
   parameter int CreatorSwCfgRomExtSkuSize = 4;
-  parameter int CreatorSwCfgUseSwRsaVerifyOffset = 324;
+  parameter int CreatorSwCfgUseSwRsaVerifyOffset = 200;
   parameter int CreatorSwCfgUseSwRsaVerifySize = 4;
-  parameter int CreatorSwCfgKeyIsValidOffset = 328;
+  parameter int CreatorSwCfgKeyIsValidOffset = 204;
   parameter int CreatorSwCfgKeyIsValidSize = 8;
   parameter int CreatorSwCfgDigestOffset = 856;
   parameter int CreatorSwCfgDigestSize = 8;
diff --git a/hw/top_earlgrey/ip/ast/data/BUILD b/hw/top_earlgrey/ip/ast/data/BUILD
index a3498f6..646e85a 100644
--- a/hw/top_earlgrey/ip/ast/data/BUILD
+++ b/hw/top_earlgrey/ip/ast/data/BUILD
@@ -4,11 +4,6 @@
 
 package(default_visibility = ["//visibility:public"])
 
-filegroup(
-    name = "all_files",
-    srcs = glob(["**"]),
-)
-
 load("//rules:autogen.bzl", "autogen_hjson_header")
 
 autogen_hjson_header(
@@ -17,3 +12,8 @@
         "ast.hjson",
     ],
 )
+
+filegroup(
+    name = "all_files",
+    srcs = glob(["**"]),
+)
diff --git a/sw/device/lib/base/BUILD b/sw/device/lib/base/BUILD
index fa33004..cf3eee8 100644
--- a/sw/device/lib/base/BUILD
+++ b/sw/device/lib/base/BUILD
@@ -20,6 +20,7 @@
         "memory.h",
         "mmio.h",
         "multibits.h",
+        "multibits_asm.h",
         "stdasm.h",
     ],
     copts = [
diff --git a/sw/device/lib/base/multibits_asm.h b/sw/device/lib/base/multibits_asm.h
new file mode 100644
index 0000000..8d539cf
--- /dev/null
+++ b/sw/device/lib/base/multibits_asm.h
@@ -0,0 +1,38 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_BASE_MULTIBITS_ASM_H_
+#define OPENTITAN_SW_DEVICE_LIB_BASE_MULTIBITS_ASM_H_
+
+/**
+ * Multi-bit boolean values for use in assembly code.
+ *
+ * Please use `multibits.h` instead when writing C code.
+ */
+
+/**
+ * 4-bits boolean values
+ */
+#define MULTIBIT_ASM_BOOL4_TRUE 0xA
+#define MULTIBIT_ASM_BOOL4_FALSE 0x5
+
+/**
+ * 8-bits boolean values
+ */
+#define MULTIBIT_ASM_BOOL8_TRUE 0x5A
+#define MULTIBIT_ASM_BOOL8_FALSE 0xA5
+
+/**
+ * 12-bits boolean values
+ */
+#define MULTIBIT_ASM_BOOL12_TRUE 0xA5A
+#define MULTIBIT_ASM_BOOL12_FALSE 0x5A5
+
+/**
+ * 16-bits boolean values
+ */
+#define MULTIBIT_ASM_BOOL16_TRUE 0x5A5A
+#define MULTIBIT_ASM_BOOL16_FALSE 0xA5A5
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_BASE_MULTIBITS_ASM_H_
diff --git a/sw/device/silicon_creator/mask_rom/mask_rom_start.S b/sw/device/silicon_creator/mask_rom/mask_rom_start.S
index 7093d25..98053a2 100644
--- a/sw/device/silicon_creator/mask_rom/mask_rom_start.S
+++ b/sw/device/silicon_creator/mask_rom/mask_rom_start.S
@@ -2,6 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+#include "sw/device/lib/base/multibits_asm.h"
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h"
 #include "ast_regs.h"
 #include "csrng_regs.h"
@@ -134,6 +135,13 @@
   li   t0, 0xFFFF0888
   csrc mie, t0
 
+  // Check if AST initialization should be skipped.
+  li   t0, (TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR + \
+            OTP_CTRL_SW_CFG_WINDOW_REG_OFFSET + \
+            OTP_CTRL_PARAM_CREATOR_SW_CFG_AST_INIT_EN_OFFSET)
+  li   t1, MULTIBIT_ASM_BOOL4_TRUE
+  bne  t0, t1, .L_ast_init_skip
+
   // Copy the AST configuration from OTP.
   li   a0, (TOP_EARLGREY_AST_BASE_ADDR + AST_REGA_0_REG_OFFSET)
   li   a1, (TOP_EARLGREY_AST_BASE_ADDR + AST_REGAL_REG_OFFSET + 4)
@@ -150,6 +158,7 @@
   andi t0, t0, 0x1
   beqz t0, .L_ast_done_loop
 
+.L_ast_init_skip:
   // The following sequence enables the minimum level of entropy required to
   // initialize memory scrambling, as well as the entropy distribution network.
   li a0, TOP_EARLGREY_ENTROPY_SRC_BASE_ADDR
diff --git a/util/design/data/multibits_asm.h.tpl b/util/design/data/multibits_asm.h.tpl
new file mode 100644
index 0000000..ab2fe30
--- /dev/null
+++ b/util/design/data/multibits_asm.h.tpl
@@ -0,0 +1,28 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_BASE_MULTIBITS_ASM_H_
+#define OPENTITAN_SW_DEVICE_LIB_BASE_MULTIBITS_ASM_H_
+
+/**
+ * Multi-bit boolean values for use in assembly code.
+ *
+ * Please use `multibits.h` instead when writing C code.
+ */
+<%
+from mubi import prim_mubi
+%>\
+% for n in range(1, n_max_nibbles + 1):
+<%
+  nbits = n * 4
+%>\
+
+/**
+ * ${nbits}-bits boolean values
+ */
+#define MULTIBIT_ASM_BOOL${nbits}_TRUE 0x${prim_mubi.mubi_value_as_hexstr(True, nbits)}
+#define MULTIBIT_ASM_BOOL${nbits}_FALSE 0x${prim_mubi.mubi_value_as_hexstr(False, nbits)}
+% endfor
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_BASE_MULTIBITS_ASM_H_
diff --git a/util/design/mubi/prim_mubi.py b/util/design/mubi/prim_mubi.py
index f0f4597..963b91d 100755
--- a/util/design/mubi/prim_mubi.py
+++ b/util/design/mubi/prim_mubi.py
@@ -12,6 +12,7 @@
 MUBI_SYNC_TPL_PATH = "util/design/data/prim_mubi_sync.sv.tpl"
 MUBI_DEC_TPL_PATH = "util/design/data/prim_mubi_dec.sv.tpl"
 MUBI_SW_TPL_PATH = "util/design/data/multibits.h.tpl"
+MUBI_SW_ASM_TPL_PATH = "util/design/data/multibits_asm.h.tpl"
 
 MUBI_PKG_OUT_PATH = "hw/ip/prim/rtl/prim_mubi_pkg.sv"
 MUBI_CORE_OUT_PATH = "hw/ip/prim/prim_mubi.core"
@@ -19,6 +20,7 @@
 MUBI_SYNC_OUT_PATH = "hw/ip/prim/rtl/prim_mubi{}_sync.sv"
 MUBI_DEC_OUT_PATH = "hw/ip/prim/rtl/prim_mubi{}_dec.sv"
 MUBI_SW_OUT_PATH = "sw/device/lib/base/multibits.h"
+MUBI_SW_ASM_OUT_PATH = "sw/device/lib/base/multibits_asm.h"
 
 N_MAX_NIBBLES = 4
 
@@ -58,6 +60,7 @@
         (MUBI_PKG_TPL_PATH, MUBI_PKG_OUT_PATH),
         (MUBI_CORE_TPL_PATH, MUBI_CORE_OUT_PATH),
         (MUBI_SW_TPL_PATH, MUBI_SW_OUT_PATH),
+        (MUBI_SW_ASM_TPL_PATH, MUBI_SW_ASM_OUT_PATH),
     ]
     for tpl, out in tpls:
         with open(tpl) as inf: