[flash_ctrl] Minor fixes

- fix seed page parameter construction
- fix address mistmatch between hardware interface and software

Signed-off-by: Timothy Chen <timothytim@google.com>
diff --git a/hw/ip/flash_ctrl/rtl/flash_ctrl.sv b/hw/ip/flash_ctrl/rtl/flash_ctrl.sv
index 96f113d..0f2f680 100644
--- a/hw/ip/flash_ctrl/rtl/flash_ctrl.sv
+++ b/hw/ip/flash_ctrl/rtl/flash_ctrl.sv
@@ -112,7 +112,7 @@
   // Flash control arbitration connections to hardware interface
   flash_ctrl_reg2hw_control_reg_t hw_ctrl;
   logic hw_req;
-  logic [BusAddrW-1:0] hw_addr;
+  logic [top_pkg::TL_AW-1:0] hw_addr;
   logic hw_done;
   logic hw_err;
   logic hw_rvalid;
@@ -126,7 +126,7 @@
 
   // Flash control muxed connections
   flash_ctrl_reg2hw_control_reg_t muxed_ctrl;
-  logic [31:0] muxed_addr;
+  logic [top_pkg::TL_AW-1:0] muxed_addr;
   logic op_start;
   logic [11:0] op_num_words;
   logic [BusAddrW-1:0] op_addr;
@@ -166,7 +166,9 @@
     // hardware interface to rd_ctrl / erase_ctrl
     .hw_req_i(hw_req),
     .hw_ctrl_i(hw_ctrl),
-    .hw_addr_i(top_pkg::TL_AW'(hw_addr)),
+
+    // hardware works on word address, however software expects byte address
+    .hw_addr_i(hw_addr),
     .hw_ack_o(hw_done),
     .hw_err_o(hw_err),
 
@@ -614,13 +616,13 @@
 
   // Unused bits
   logic [BusByteWidth-1:0] unused_byte_sel;
-  logic [31-BusAddrW:0] unused_higher_addr_bits;
-  logic [31:0] unused_scratch;
+  logic [top_pkg::TL_AW-1-BusAddrW:0] unused_higher_addr_bits;
+  logic [top_pkg::TL_AW-1:0] unused_scratch;
 
 
   // Unused signals
   assign unused_byte_sel = muxed_addr[BusByteWidth-1:0];
-  assign unused_higher_addr_bits = muxed_addr[31:BusAddrW];
+  assign unused_higher_addr_bits = muxed_addr[top_pkg::TL_AW-1:BusAddrW];
   assign unused_scratch = reg2hw.scratch;
 
 
diff --git a/hw/ip/flash_ctrl/rtl/flash_ctrl_lcmgr.sv b/hw/ip/flash_ctrl/rtl/flash_ctrl_lcmgr.sv
index adaaab6..2ebc1bc 100644
--- a/hw/ip/flash_ctrl/rtl/flash_ctrl_lcmgr.sv
+++ b/hw/ip/flash_ctrl/rtl/flash_ctrl_lcmgr.sv
@@ -12,7 +12,7 @@
   // interface to ctrl arb control ports
   output flash_ctrl_reg_pkg::flash_ctrl_reg2hw_control_reg_t ctrl_o,
   output logic req_o,
-  output logic [BusAddrW-1:0] addr_o,
+  output logic [top_pkg::TL_AW-1:0] addr_o,
   input done_i,
   input err_i,
 
@@ -290,7 +290,8 @@
   assign ctrl_o.erase_sel.q = erase_type;
   assign ctrl_o.partition_sel.q = part_sel;
   assign ctrl_o.num = num_words;
-  assign addr_o = addr;
+  // address is consistent with software width format (full bus)
+  assign addr_o = top_pkg::TL_AW'({addr, {BusByteWidth{1'b0}}});
   assign init_busy_o = seed_phase;
   assign req_o = seed_phase | rma_phase;
   assign rready_o = 1'b1;
diff --git a/hw/ip/flash_ctrl/rtl/flash_ctrl_pkg.sv b/hw/ip/flash_ctrl/rtl/flash_ctrl_pkg.sv
index 5e6b751..e98e3bd 100644
--- a/hw/ip/flash_ctrl/rtl/flash_ctrl_pkg.sv
+++ b/hw/ip/flash_ctrl/rtl/flash_ctrl_pkg.sv
@@ -10,6 +10,7 @@
   // design constants
   parameter int DataWidth       = top_pkg::FLASH_DATA_WIDTH;
   parameter int NumBanks        = top_pkg::FLASH_BANKS;
+  parameter int InfoTypes       = 1; // How many types of info per bank
   parameter int InfosPerBank    = top_pkg::FLASH_INFO_PER_BANK;  // Info pages per bank
   parameter int PagesPerBank    = top_pkg::FLASH_PAGES_PER_BANK; // Data pages per bank
   parameter int WordsPerPage    = top_pkg::FLASH_WORDS_PER_PAGE; // Number of flash words per page
@@ -43,13 +44,25 @@
   // fifo parameters
   parameter int FifoDepthW      = $clog2(FifoDepth+1);
 
+  // partition sizes per bank
+  // total number of partitions is always Data + different types of info
+  parameter int TotalPartitions = 1 + InfoTypes;
+  parameter int TotalPartitionsWidth = $clog2(TotalPartitions);
+
+  // The end address in bus words for each kind of partition in each bank
+  parameter logic [BusBankAddrW-1:0] PartitionEndAddr [0:TotalPartitions-1] =
+    {
+      PagesPerBank * BusWordsPerPage - 1,
+      InfosPerBank * BusWordsPerPage - 1
+    };
+
   // flash life cycle / key manager management constants
   // One page for creator seeds
   // One page for owner seeds
   parameter int NumSeeds = 2;
   parameter int CreatorInfoPage = 1;
   parameter int OwnerInfoPage = 2;
-  parameter logic [NumSeeds-1:0][InfoPageW-1:0] SeedInfoPageSel =
+  parameter logic [InfoPageW-1:0] SeedInfoPageSel [0:NumSeeds-1] =
     {
       CreatorInfoPage,
       OwnerInfoPage
@@ -85,7 +98,7 @@
   } flash_flfo_dir_e;
 
   // Flash partition type
-  typedef enum logic {
+  typedef enum logic [TotalPartitionsWidth-1:0] {
     FlashPartData = 1'b0,
     FlashPartInfo = 1'b1
   } flash_part_e;
diff --git a/hw/top_earlgrey/rtl/top_pkg.sv b/hw/top_earlgrey/rtl/top_pkg.sv
index b220dba..50269e2 100644
--- a/hw/top_earlgrey/rtl/top_pkg.sv
+++ b/hw/top_earlgrey/rtl/top_pkg.sv
@@ -15,7 +15,6 @@
 localparam int FLASH_BANKS=2;
 localparam int FLASH_PAGES_PER_BANK=256;
 localparam int FLASH_WORDS_PER_PAGE=128;
-localparam int FLASH_BYTES_PER_WORD=TL_DBW;
 localparam int FLASH_INFO_PER_BANK=4;
 localparam int FLASH_DATA_WIDTH=64;
 localparam int NUM_AST_ALERTS=7;