[pwrmgr] advance to d2
Signed-off-by: Timothy Chen <timothytim@google.com>
diff --git a/hw/ip/pwrmgr/data/pwrmgr.prj.hjson b/hw/ip/pwrmgr/data/pwrmgr.prj.hjson
index 641ead2..3b639c8 100644
--- a/hw/ip/pwrmgr/data/pwrmgr.prj.hjson
+++ b/hw/ip/pwrmgr/data/pwrmgr.prj.hjson
@@ -15,6 +15,14 @@
design_stage: "D1",
verification_stage: "V0", // this module is not verified at the block level
dif_stage: "S0",
+ commit_id: "b2abc989498f072d9a5530f8aab9b58c1f92c9fb"
+ }
+ {
+ version: "0.5",
+ life_stage: "L1",
+ design_stage: "D2",
+ verification_stage: "V0", // this module is not verified at the block level
+ dif_stage: "S0",
}
]
}
diff --git a/hw/ip/pwrmgr/doc/checklist.md b/hw/ip/pwrmgr/doc/checklist.md
index 1f79e4c..6571289 100644
--- a/hw/ip/pwrmgr/doc/checklist.md
+++ b/hw/ip/pwrmgr/doc/checklist.md
@@ -35,25 +35,25 @@
Type | Item | Resolution | Note/Collaterals
--------------|-------------------------|-------------|------------------
-Documentation | [NEW_FEATURES][] | Not Started |
-Documentation | [BLOCK_DIAGRAM][] | Not Started |
-Documentation | [DOC_INTERFACE][] | Not Started |
-Documentation | [MISSING_FUNC][] | Not Started |
-Documentation | [FEATURE_FROZEN][] | Not Started |
-RTL | [FEATURE_COMPLETE][] | Not Started |
-RTL | [AREA_CHECK][] | Not Started |
-RTL | [PORT_FROZEN][] | Not Started |
-RTL | [ARCHITECTURE_FROZEN][] | Not Started |
-RTL | [REVIEW_TODO][] | Not Started |
-RTL | [STYLE_X][] | Not Started |
-Code Quality | [LINT_PASS][] | Not Started |
-Code Quality | [CDC_SETUP][] | Not Started |
-Code Quality | [FPGA_TIMING][] | Not Started |
-Code Quality | [CDC_SYNCMACRO][] | Not Started |
-Security | [SEC_CM_IMPLEMENTED][] | Not Started |
-Security | [SEC_NON_RESET_FLOPS][] | Not Started |
-Security | [SEC_SHADOW_REGS][] | Not Started |
-Security | [SEC_RND_CNST][] | Not Started |
+Documentation | [NEW_FEATURES][] | Done |
+Documentation | [BLOCK_DIAGRAM][] | Done |
+Documentation | [DOC_INTERFACE][] | Done |
+Documentation | [MISSING_FUNC][] | Done |
+Documentation | [FEATURE_FROZEN][] | Done |
+RTL | [FEATURE_COMPLETE][] | Done |
+RTL | [AREA_CHECK][] | Done |
+RTL | [PORT_FROZEN][] | Done |
+RTL | [ARCHITECTURE_FROZEN][] | Done |
+RTL | [REVIEW_TODO][] | Done |
+RTL | [STYLE_X][] | Done |
+Code Quality | [LINT_PASS][] | Done |
+Code Quality | [CDC_SETUP][] | NA |
+Code Quality | [FPGA_TIMING][] | Done |
+Code Quality | [CDC_SYNCMACRO][] | Done |
+Security | [SEC_CM_IMPLEMENTED][] | Waived | Full security countermeasures postponed to post d2
+Security | [SEC_NON_RESET_FLOPS][] | Done |
+Security | [SEC_SHADOW_REGS][] | Waived | Full security countermeasures postponed to post d2
+Security | [SEC_RND_CNST][] | NA |
[NEW_FEATURES]: {{<relref "/doc/project/checklist.md#new_features" >}}
[BLOCK_DIAGRAM]: {{<relref "/doc/project/checklist.md#block_diagram" >}}
