| commit | 2aedf641120665b91c3a5d5aa214175d09f71ee6 | [log] [tgz] |
|---|---|---|
| author | Srikrishna Iyer <sriyer@google.com> | Tue May 12 21:52:44 2020 -0700 |
| committer | sriyerg <46467186+sriyerg@users.noreply.github.com> | Wed May 13 11:21:47 2020 -0700 |
| tree | c07fd586d65662afad082ccc2ac3e42055ee99dd | |
| parent | c75c6c1476c31e427fa2d45f3833232c64d23d8f [diff] |
[chip dv] Single instance of SW logger interface The existing code had a unique SW logger interface per SW image running on the CPU - the boot rom and the test SW. Both instances are monitoring the same address location in the RAM for new log messages. Both are operational from the start of time until the end of the simulation. This is problematic because only one SW image can run on the CPU at a time - CPU first executes the boot rom image and then jumps to the flash to start executing the SW test image. Additional logic would have had to be added to ensure that only one of them is running based on which image the CPU is currently executing. The easier way to deal with it is to just have a single instance of the logger instead, which is what this PR does. Signed-off-by: Srikrishna Iyer <sriyer@google.com>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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