commit | 26177368e94e9aaff57ca48a2040ca8a24f01356 | [log] [tgz] |
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author | Rupert Swarbrick <rswarbrick@lowrisc.org> | Fri Dec 18 14:43:52 2020 +0000 |
committer | Rupert Swarbrick <rswarbrick@gmail.com> | Fri Dec 18 17:58:24 2020 +0000 |
tree | 666bd357bc92e93ec70fb1623c727c45bb1cf3c4 | |
parent | 0e8551f1d2584f860515ec3771d337cf5bf106c9 [diff] |
[otbn] Report errors properly from ISS to RTL Most of the plumbing is pretty obvious. The only challenging bit is getting multiple values back from the C++ model wrapper to the SV code in otbn_core_model.sv. We were already passing 3 flags as the bottom 3 bits of a uint32_t. Now we pass a 16-bit error code as the top 3 bits. If we ever need more than that many bits, we might have to do something cleverer with out parameters, but I thought the quick and dirty solution was probably best for now. Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).