commit 235b5faf86f7cc187a47f0cb4f12d3ebd8ce1996
author Srikrishna Iyer <sriyer@google.com> Wed Aug 17 17:28:57 2022 -0700
committer Srikrishna Iyer <46467186+sriyerg@users.noreply.github.com> Wed Aug 17 20:02:04 2022 -0700
tree 1ce1dd09e70be4095b9a858e0f37383ec9960bc6
parent 46f89e618268ad3b464a0720ebf9554c61df90ff

[chip dv xcelium] Add a dedicated regression target for Xcelium

THis adds a dedicated mini regression target for Xcelium that can
be invoked in presubmit CI.

Signed-off-by: Srikrishna Iyer <sriyer@google.com>

hw/top_earlgrey/dv/chip_sim_cfg.hjson

diff --git a/hw/top_earlgrey/dv/chip_sim_cfg.hjson b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
index fbee96c..5fe3ceb 100644
--- a/hw/top_earlgrey/dv/chip_sim_cfg.hjson
+++ b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
@@ -1129,5 +1129,10 @@
               "chip_sw_sram_ctrl_main_scrambled_access_jitter_en"
              ]
     }
+    {
+      name: xcelium_ci
+      tests: ["chip_plic_all_irqs"]
+      reseed: 1
+    }
   ]
 }