| commit | 21762853885c76cd12a9496fe328b2488fbc33a5 | [log] [tgz] |
|---|---|---|
| author | Philipp Wagner <phw@lowrisc.org> | Wed Oct 27 22:47:36 2021 +0100 |
| committer | Philipp Wagner <mail@philipp-wagner.com> | Thu Oct 28 12:07:50 2021 +0100 |
| tree | db0d39c4514bcc8d1ef8e2aab101979da0b9c209 | |
| parent | b704aa293ead3f259ba235b359993051d22e983b [diff] |
[spi_host] Fix signal assignment width mismatch Reported by VCS: ``` Warning-[TMBIN] Too many bits in Based Number ../src/lowrisc_ip_spi_host_0.1/rtl/spi_host_shift_register.sv, 65 The specified width is '4' bits, actually got '8' bits. The offending number is : '00'. ``` ``` Warning-[TMBIN] Too many bits in Based Number ../src/lowrisc_ip_spi_host_0.1/rtl/spi_host_fsm.sv, 452 The specified width is '1' bit, actually got '2' bits. The offending number is : '00'. ``` Signed-off-by: Philipp Wagner <phw@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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