[uartdpi] Accept log file name through plusarg

The UARTDPI module simulates an UART device by creating a
pseudo-terminal (e.g. /dev/pts/N). Additionally, each written character
is also written to a log file, in our case always `uart0.log` in the
current directory.

This patch adds the ability to specify the path of the log file through
a plus argument (plusarg). The defaults remain unchanged: calling the
simulation without special arguents writes an `uart0.log` file.

As a new feature, the log file can now also be given as "-", which
writes UART logs directly to STDOUT. In this case, the running
simulation directly shows all output printed from device software, e.g.
from `LOG()` macros, making the life of software developers much easier.

To write all logs of uart0 (the one and only UART in an Earl Grey
system), use a command like the following:

```
build/lowrisc_systems_top_earlgrey_verilator_0.1/sim-verilator/Vtop_earlgrey_verilator \
  --meminit=rom,build-bin/sw/device/boot_rom/boot_rom_sim_verilator.elf  \
  --meminit=flash,build-bin/sw/device/tests/dif_hmac_sanitytest_sim_verilator.elf \
  +UARTDPI_LOG_uart0=-
```

To implement this functionality, the log writing was refactored from
SystemVerilog to C (DPI) code.

Signed-off-by: Philipp Wagner <phw@lowrisc.org>
5 files changed
tree: 7cb4bf64f612697f6fe873834dcee7d0581b6e81
  1. .github/
  2. ci/
  3. doc/
  4. hw/
  5. site/
  6. sw/
  7. test/
  8. util/
  9. .clang-format
  10. .dockerignore
  11. .flake8
  12. .gitignore
  13. .style.yapf
  14. _index.md
  15. apt-requirements.txt
  16. azure-pipelines.yml
  17. check_tool_requirements.core
  18. CLA
  19. COMMITTERS
  20. CONTRIBUTING.md
  21. LICENSE
  22. meson.build
  23. meson_init.sh
  24. meson_options.txt
  25. python-requirements.txt
  26. README.md
  27. tool_requirements.py
  28. toolchain.txt
README.md

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