[top] Auto-generate files

Signed-off-by: Timothy Chen <timothytim@google.com>
diff --git a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
index ede8a25..1985ae8 100644
--- a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
+++ b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
@@ -2045,7 +2045,7 @@
       alert_list: []
       wakeup_list: []
       reset_request_list: []
-      scan: "false"
+      scan: "true"
       scan_reset: "false"
       inter_signal_list:
       [
@@ -2139,15 +2139,6 @@
           index: -1
         }
         {
-          struct: clk_dft
-          type: uni
-          name: dft
-          act: rcv
-          package: clkmgr_pkg
-          inst_name: clkmgr
-          index: -1
-        }
-        {
           struct: logic
           type: uni
           name: idle
@@ -6625,15 +6616,6 @@
         index: -1
       }
       {
-        struct: clk_dft
-        type: uni
-        name: dft
-        act: rcv
-        package: clkmgr_pkg
-        inst_name: clkmgr
-        index: -1
-      }
-      {
         struct: logic
         type: uni
         name: idle
diff --git a/hw/top_earlgrey/ip/clkmgr/data/autogen/clkmgr.hjson b/hw/top_earlgrey/ip/clkmgr/data/autogen/clkmgr.hjson
index 8be33bd..b840cd2 100644
--- a/hw/top_earlgrey/ip/clkmgr/data/autogen/clkmgr.hjson
+++ b/hw/top_earlgrey/ip/clkmgr/data/autogen/clkmgr.hjson
@@ -16,6 +16,7 @@
 #
 {
   name: "CLKMGR",
+  scan: "true",
   clock_primary: "clk_i",
   other_clock_list: [],
   reset_primary: "rst_ni",
@@ -85,13 +86,6 @@
       act:     "rsp",
     },
 
-    { struct:  "clk_dft",
-      type:    "uni",
-      name:    "dft",
-      act:     "rcv",
-      package: "clkmgr_pkg", // This should be moved elsewhere later
-    },
-
     { struct:  "logic",
       type:    "uni",
       name:    "idle",
diff --git a/hw/top_earlgrey/ip/clkmgr/rtl/autogen/clkmgr.sv b/hw/top_earlgrey/ip/clkmgr/rtl/autogen/clkmgr.sv
index 8bac20c..d7d8373 100644
--- a/hw/top_earlgrey/ip/clkmgr/rtl/autogen/clkmgr.sv
+++ b/hw/top_earlgrey/ip/clkmgr/rtl/autogen/clkmgr.sv
@@ -44,7 +44,7 @@
   output pwrmgr_pkg::pwr_clk_rsp_t pwr_o,
 
   // dft interface
-  input clk_dft_t dft_i,
+  input scanmode_i,
 
   // idle hints
   input [3:0] idle_i,
@@ -83,6 +83,7 @@
   ) u_io_div2_div (
     .clk_i(clk_io_i),
     .rst_ni(rst_io_ni),
+    .test_en_i(scanmode_i),
     .clk_o(clk_io_div2_i)
   );
   prim_clock_div #(
@@ -90,6 +91,7 @@
   ) u_io_div4_div (
     .clk_i(clk_io_i),
     .rst_ni(rst_io_ni),
+    .test_en_i(scanmode_i),
     .clk_o(clk_io_div4_i)
   );
 
@@ -100,13 +102,34 @@
   // completely untouched. The only reason they are here is for easier
   // bundling management purposes through clocks_o
   ////////////////////////////////////////////////////
-  assign clocks_o.clk_io_div4_powerup = clk_io_div4_i;
-  assign clocks_o.clk_aon_powerup = clk_aon_i;
-  assign clocks_o.clk_main_powerup = clk_main_i;
-  assign clocks_o.clk_io_powerup = clk_io_i;
-  assign clocks_o.clk_usb_powerup = clk_usb_i;
-  assign clocks_o.clk_io_div2_powerup = clk_io_div2_i;
-  assign clocks_o.clk_aon_secure = clk_aon_i;
+  prim_clock_buf u_clk_io_div4_powerup_buf (
+    .clk_i(clk_io_div4_i),
+    .clk_o(clocks_o.clk_io_div4_powerup)
+  );
+  prim_clock_buf u_clk_aon_powerup_buf (
+    .clk_i(clk_aon_i),
+    .clk_o(clocks_o.clk_aon_powerup)
+  );
+  prim_clock_buf u_clk_main_powerup_buf (
+    .clk_i(clk_main_i),
+    .clk_o(clocks_o.clk_main_powerup)
+  );
+  prim_clock_buf u_clk_io_powerup_buf (
+    .clk_i(clk_io_i),
+    .clk_o(clocks_o.clk_io_powerup)
+  );
+  prim_clock_buf u_clk_usb_powerup_buf (
+    .clk_i(clk_usb_i),
+    .clk_o(clocks_o.clk_usb_powerup)
+  );
+  prim_clock_buf u_clk_io_div2_powerup_buf (
+    .clk_i(clk_io_div2_i),
+    .clk_o(clocks_o.clk_io_div2_powerup)
+  );
+  prim_clock_buf u_clk_aon_secure_buf (
+    .clk_i(clk_aon_i),
+    .clk_o(clocks_o.clk_aon_secure)
+  );
 
   ////////////////////////////////////////////////////
   // Root gating
@@ -133,7 +156,7 @@
   prim_clock_gating_sync u_main_cg (
     .clk_i(clk_main_i),
     .rst_ni(rst_main_ni),
-    .test_en_i(dft_i.test_en),
+    .test_en_i(scanmode_i),
     .async_en_i(pwr_i.ip_clk_en),
     .en_o(clk_main_en),
     .clk_o(clk_main_root)
@@ -141,7 +164,7 @@
   prim_clock_gating_sync u_io_cg (
     .clk_i(clk_io_i),
     .rst_ni(rst_io_ni),
-    .test_en_i(dft_i.test_en),
+    .test_en_i(scanmode_i),
     .async_en_i(pwr_i.ip_clk_en),
     .en_o(clk_io_en),
     .clk_o(clk_io_root)
@@ -149,7 +172,7 @@
   prim_clock_gating_sync u_usb_cg (
     .clk_i(clk_usb_i),
     .rst_ni(rst_usb_ni),
-    .test_en_i(dft_i.test_en),
+    .test_en_i(scanmode_i),
     .async_en_i(pwr_i.ip_clk_en),
     .en_o(clk_usb_en),
     .clk_o(clk_usb_root)
@@ -157,7 +180,7 @@
   prim_clock_gating_sync u_io_div2_cg (
     .clk_i(clk_io_div2_i),
     .rst_ni(rst_io_div2_ni),
-    .test_en_i(dft_i.test_en),
+    .test_en_i(scanmode_i),
     .async_en_i(pwr_i.ip_clk_en),
     .en_o(clk_io_div2_en),
     .clk_o(clk_io_div2_root)
@@ -165,7 +188,7 @@
   prim_clock_gating_sync u_io_div4_cg (
     .clk_i(clk_io_div4_i),
     .rst_ni(rst_io_div4_ni),
-    .test_en_i(dft_i.test_en),
+    .test_en_i(scanmode_i),
     .async_en_i(pwr_i.ip_clk_en),
     .en_o(clk_io_div4_en),
     .clk_o(clk_io_div4_root)
@@ -255,10 +278,12 @@
     .q_o(clk_io_div4_peri_sw_en)
   );
 
-  prim_clock_gating u_clk_io_div4_peri_cg (
-    .clk_i(clk_io_div4_i),
+  prim_clock_gating #(
+    .NoFpgaGate(1'b1)
+  ) u_clk_io_div4_peri_cg (
+    .clk_i(clk_io_div4_root),
     .en_i(clk_io_div4_peri_sw_en & clk_io_div4_en),
-    .test_en_i(dft_i.test_en),
+    .test_en_i(scanmode_i),
     .clk_o(clocks_o.clk_io_div4_peri)
   );
 
@@ -271,10 +296,12 @@
     .q_o(clk_usb_peri_sw_en)
   );
 
-  prim_clock_gating u_clk_usb_peri_cg (
-    .clk_i(clk_usb_i),
+  prim_clock_gating #(
+    .NoFpgaGate(1'b1)
+  ) u_clk_usb_peri_cg (
+    .clk_i(clk_usb_root),
     .en_i(clk_usb_peri_sw_en & clk_usb_en),
-    .test_en_i(dft_i.test_en),
+    .test_en_i(scanmode_i),
     .clk_o(clocks_o.clk_usb_peri)
   );
 
@@ -305,10 +332,12 @@
     .q_o(clk_main_aes_hint)
   );
 
-  prim_clock_gating u_clk_main_aes_cg (
-    .clk_i(clk_main_i),
+  prim_clock_gating #(
+    .NoFpgaGate(1'b1)
+  ) u_clk_main_aes_cg (
+    .clk_i(clk_main_root),
     .en_i(clk_main_aes_en & clk_main_en),
-    .test_en_i(dft_i.test_en),
+    .test_en_i(scanmode_i),
     .clk_o(clocks_o.clk_main_aes)
   );
 
@@ -323,10 +352,12 @@
     .q_o(clk_main_hmac_hint)
   );
 
-  prim_clock_gating u_clk_main_hmac_cg (
-    .clk_i(clk_main_i),
+  prim_clock_gating #(
+    .NoFpgaGate(1'b1)
+  ) u_clk_main_hmac_cg (
+    .clk_i(clk_main_root),
     .en_i(clk_main_hmac_en & clk_main_en),
-    .test_en_i(dft_i.test_en),
+    .test_en_i(scanmode_i),
     .clk_o(clocks_o.clk_main_hmac)
   );
 
@@ -341,10 +372,12 @@
     .q_o(clk_main_kmac_hint)
   );
 
-  prim_clock_gating u_clk_main_kmac_cg (
-    .clk_i(clk_main_i),
+  prim_clock_gating #(
+    .NoFpgaGate(1'b1)
+  ) u_clk_main_kmac_cg (
+    .clk_i(clk_main_root),
     .en_i(clk_main_kmac_en & clk_main_en),
-    .test_en_i(dft_i.test_en),
+    .test_en_i(scanmode_i),
     .clk_o(clocks_o.clk_main_kmac)
   );
 
@@ -359,10 +392,12 @@
     .q_o(clk_main_otbn_hint)
   );
 
-  prim_clock_gating u_clk_main_otbn_cg (
-    .clk_i(clk_main_i),
+  prim_clock_gating #(
+    .NoFpgaGate(1'b1)
+  ) u_clk_main_otbn_cg (
+    .clk_i(clk_main_root),
     .en_i(clk_main_otbn_en & clk_main_en),
-    .test_en_i(dft_i.test_en),
+    .test_en_i(scanmode_i),
     .clk_o(clocks_o.clk_main_otbn)
   );
 
diff --git a/hw/top_earlgrey/ip/clkmgr/rtl/autogen/clkmgr_pkg.sv b/hw/top_earlgrey/ip/clkmgr/rtl/autogen/clkmgr_pkg.sv
index f332a04..7edd4ea 100644
--- a/hw/top_earlgrey/ip/clkmgr/rtl/autogen/clkmgr_pkg.sv
+++ b/hw/top_earlgrey/ip/clkmgr/rtl/autogen/clkmgr_pkg.sv
@@ -20,14 +20,6 @@
   } hint_names_e;
 
   typedef struct packed {
-    logic test_en;
-  } clk_dft_t;
-
-  parameter clk_dft_t CLK_DFT_DEFAULT = '{
-    test_en: 1'b0
-  };
-
-  typedef struct packed {
   logic clk_io_div4_powerup;
   logic clk_aon_powerup;
   logic clk_main_powerup;
diff --git a/hw/top_earlgrey/ip/rstmgr/rtl/autogen/rstmgr.sv b/hw/top_earlgrey/ip/rstmgr/rtl/autogen/rstmgr.sv
index ec70c9c..32f8756 100644
--- a/hw/top_earlgrey/ip/rstmgr/rtl/autogen/rstmgr.sv
+++ b/hw/top_earlgrey/ip/rstmgr/rtl/autogen/rstmgr.sv
@@ -67,7 +67,9 @@
     .rst_no(rst_por_aon_n)
   );
 
-  prim_clock_mux2 u_rst_por_aon_n_mux (
+  prim_clock_mux2 #(
+    .NoFpgaBufG(1'b1)
+  ) u_rst_por_aon_n_mux (
     .clk0_i(rst_por_aon_n),
     .clk1_i(scan_rst_ni),
     .sel_i(scanmode_i),
@@ -194,7 +196,9 @@
     .q_o(rst_por_n)
   );
 
-  prim_clock_mux2 u_por_mux (
+  prim_clock_mux2 #(
+    .NoFpgaBufG(1'b1)
+  ) u_por_mux (
     .clk0_i(rst_por_n),
     .clk1_i(scan_rst_ni),
     .sel_i(scanmode_i),
@@ -213,7 +217,9 @@
     .q_o(rst_por_io_n)
   );
 
-  prim_clock_mux2 u_por_io_mux (
+  prim_clock_mux2 #(
+    .NoFpgaBufG(1'b1)
+  ) u_por_io_mux (
     .clk0_i(rst_por_io_n),
     .clk1_i(scan_rst_ni),
     .sel_i(scanmode_i),
@@ -232,7 +238,9 @@
     .q_o(rst_por_io_div2_n)
   );
 
-  prim_clock_mux2 u_por_io_div2_mux (
+  prim_clock_mux2 #(
+    .NoFpgaBufG(1'b1)
+  ) u_por_io_div2_mux (
     .clk0_i(rst_por_io_div2_n),
     .clk1_i(scan_rst_ni),
     .sel_i(scanmode_i),
@@ -251,7 +259,9 @@
     .q_o(rst_por_io_div4_n)
   );
 
-  prim_clock_mux2 u_por_io_div4_mux (
+  prim_clock_mux2 #(
+    .NoFpgaBufG(1'b1)
+  ) u_por_io_div4_mux (
     .clk0_i(rst_por_io_div4_n),
     .clk1_i(scan_rst_ni),
     .sel_i(scanmode_i),
@@ -270,7 +280,9 @@
     .q_o(rst_por_usb_n)
   );
 
-  prim_clock_mux2 u_por_usb_mux (
+  prim_clock_mux2 #(
+    .NoFpgaBufG(1'b1)
+  ) u_por_usb_mux (
     .clk0_i(rst_por_usb_n),
     .clk1_i(scan_rst_ni),
     .sel_i(scanmode_i),
@@ -289,7 +301,9 @@
     .q_o(rst_lc_n)
   );
 
-  prim_clock_mux2 u_lc_mux (
+  prim_clock_mux2 #(
+    .NoFpgaBufG(1'b1)
+  ) u_lc_mux (
     .clk0_i(rst_lc_n),
     .clk1_i(scan_rst_ni),
     .sel_i(scanmode_i),
@@ -308,7 +322,9 @@
     .q_o(rst_lc_io_n)
   );
 
-  prim_clock_mux2 u_lc_io_mux (
+  prim_clock_mux2 #(
+    .NoFpgaBufG(1'b1)
+  ) u_lc_io_mux (
     .clk0_i(rst_lc_io_n),
     .clk1_i(scan_rst_ni),
     .sel_i(scanmode_i),
@@ -327,7 +343,9 @@
     .q_o(rst_sys_n)
   );
 
-  prim_clock_mux2 u_sys_mux (
+  prim_clock_mux2 #(
+    .NoFpgaBufG(1'b1)
+  ) u_sys_mux (
     .clk0_i(rst_sys_n),
     .clk1_i(scan_rst_ni),
     .sel_i(scanmode_i),
@@ -346,7 +364,9 @@
     .q_o(rst_sys_io_n)
   );
 
-  prim_clock_mux2 u_sys_io_mux (
+  prim_clock_mux2 #(
+    .NoFpgaBufG(1'b1)
+  ) u_sys_io_mux (
     .clk0_i(rst_sys_io_n),
     .clk1_i(scan_rst_ni),
     .sel_i(scanmode_i),
@@ -365,7 +385,9 @@
     .q_o(rst_sys_io_div4_n)
   );
 
-  prim_clock_mux2 u_sys_io_div4_mux (
+  prim_clock_mux2 #(
+    .NoFpgaBufG(1'b1)
+  ) u_sys_io_div4_mux (
     .clk0_i(rst_sys_io_div4_n),
     .clk1_i(scan_rst_ni),
     .sel_i(scanmode_i),
@@ -384,7 +406,9 @@
     .q_o(rst_sys_aon_n)
   );
 
-  prim_clock_mux2 u_sys_aon_mux (
+  prim_clock_mux2 #(
+    .NoFpgaBufG(1'b1)
+  ) u_sys_aon_mux (
     .clk0_i(rst_sys_aon_n),
     .clk1_i(scan_rst_ni),
     .sel_i(scanmode_i),
@@ -403,7 +427,9 @@
     .q_o(rst_spi_device_n)
   );
 
-  prim_clock_mux2 u_spi_device_mux (
+  prim_clock_mux2 #(
+    .NoFpgaBufG(1'b1)
+  ) u_spi_device_mux (
     .clk0_i(rst_spi_device_n),
     .clk1_i(scan_rst_ni),
     .sel_i(scanmode_i),
@@ -422,7 +448,9 @@
     .q_o(rst_usb_n)
   );
 
-  prim_clock_mux2 u_usb_mux (
+  prim_clock_mux2 #(
+    .NoFpgaBufG(1'b1)
+  ) u_usb_mux (
     .clk0_i(rst_usb_n),
     .clk1_i(scan_rst_ni),
     .sel_i(scanmode_i),
diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
index d50ff8f..5905b71 100644
--- a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
+++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
@@ -922,10 +922,10 @@
       .clocks_ast_o(clks_ast_o),
       .pwr_i(pwrmgr_pwr_clk_req),
       .pwr_o(pwrmgr_pwr_clk_rsp),
-      .dft_i(clkmgr_pkg::CLK_DFT_DEFAULT),
       .idle_i(clkmgr_idle),
       .tl_i(clkmgr_tl_req),
       .tl_o(clkmgr_tl_rsp),
+      .scanmode_i   (scanmode_i),
       .clk_i (clkmgr_clocks.clk_io_div4_powerup),
       .rst_ni (rstmgr_resets.rst_por_io_n),
       .rst_main_ni (rstmgr_resets.rst_por_n),