commit | 1c026d6659bc16ad56fde46fac3e2ed98ca6b603 | [log] [tgz] |
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author | Rupert Swarbrick <rswarbrick@lowrisc.org> | Tue Nov 16 14:18:48 2021 +0000 |
committer | Rupert Swarbrick <rswarbrick@gmail.com> | Tue Nov 16 16:56:07 2021 +0000 |
tree | 869b0c193939a8d89c815b4d9eaa82fc65e6ec76 | |
parent | 1330f8548ed014a3ef5ff9a051bf11a78c5b520b [diff] |
[util] Remove debug prints to speed up secded_gen.py Now that we're adding ECC check bits to flash images, a significant fraction of SW build time is spent running gen-flash-img.py. Profiling a run of: ../util/design/gen-flash-img.py \ sw/device/tests/uart_smoketest_sim_dv.64.vmem \ sw/device/tests/uart_smoketest_sim_dv.64.scr.vmem (run this in the build-out directory; choice of test completely arbitrary!) with py-spy, I realised that we were spending almost half our time constructing debug messages that we didn't write out. I'm sure there are cleverer things we can do, but it looks like we probably don't really need these so let's just drop them for now. After these changes, here are the big contributors to the total runtime for the script: 38% load up secded_cfg.hjson 36% pick an ECC code (we choose it on-the-fly) ~15% actually computing ECC bits This still seems a little silly, but this patch gets us a factor of 2, so maybe it's a good start! Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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