| commit | 1ba34661dda3a0d4e323fd0ae616218163b6f510 | [log] [tgz] |
|---|---|---|
| author | Silvestrs Timofejevs <silvestrst@lowrisc.org> | Tue Mar 01 17:07:00 2022 +0000 |
| committer | Silvestrs Timofejevs <silvestrst@lowrisc.org> | Wed Mar 09 11:36:25 2022 +0000 |
| tree | 5332e3aecc861394daeb40896967c46cc327a039 | |
| parent | e5b4eda44e53a5950716a3993d397d5374f1af95 [diff] |
[dif_sram_ctrl] Add missing implementation This change adds `dif_sram_ctrl_scramble` implementation and unittests. This function constitutes the recommended way of completely scrambling the SRAM. The function is blocking, the alternative way of constructing a non-blocking version is described in the description. `dif_sram_ctrl_scramble_is_busy` has been removed from the header file, as there is no real need for it, the status can be queried through `dif_sram_ctrl_get_status`. `dif_sram_ctrl_wipe` is implemented in #10490 . Signed-off-by: Silvestrs Timofejevs <silvestrst@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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