[xbar/dv] Update chip-level xbar to drive from each IP ports
1. detail discussion at #2464
2. re-enable chip xbar tests (tmp disabled at #3040)
3. exceptionis (non-comportable instance/port name) are handled in
termodule.py:find_otherside_module
1. all mem IPs (rom, ram_main, eflash, ram_ret), which can be removed
when we make memory as comportable IP
2. corei, cored, debug_mem, dm_sba: need more discussion
Signed-off-by: Weicai Yang <weicai@google.com>
diff --git a/hw/ip/tlul/generic_dv/xbar_tests.hjson b/hw/ip/tlul/generic_dv/xbar_tests.hjson
index 14a262d..c46f44e 100644
--- a/hw/ip/tlul/generic_dv/xbar_tests.hjson
+++ b/hw/ip/tlul/generic_dv/xbar_tests.hjson
@@ -164,8 +164,7 @@
regressions: [
{
name: sanity
- // tests: ["xbar_{name}_sanity"]
- tests: []
+ tests: ["xbar_{name}_sanity"]
}
]
}
diff --git a/hw/top_earlgrey/data/tb__xbar_connect.sv.tpl b/hw/top_earlgrey/data/tb__xbar_connect.sv.tpl
index dd0f9f7..ac635e1 100644
--- a/hw/top_earlgrey/data/tb__xbar_connect.sv.tpl
+++ b/hw/top_earlgrey/data/tb__xbar_connect.sv.tpl
@@ -5,6 +5,7 @@
// tb__xbar_connect generated by `topgen.py` tool
<%
from collections import OrderedDict
+import topgen.lib as lib
top_hier = 'tb.dut.top_' + top["name"] + '.'
clk_hier = top_hier + top["clocks"]["hier_paths"]["top"]
@@ -28,6 +29,20 @@
elif node["type"] == "device" and not node["xbar"]:
devices[node["name"]] = "clk_" + clk_src[node["clock"]]
%>\
+<%text>
+`define DRIVE_TL_HOST_IF(tl_name, inst_name, sig_name) \
+ force ``tl_name``_tl_if.d2h = dut.top_earlgrey.u_``inst_name``.``sig_name``_i; \
+ force dut.top_earlgrey.u_``inst_name``.``sig_name``_o = ``tl_name``_tl_if.h2d; \
+ uvm_config_db#(virtual tl_if)::set(null, $sformatf("*%0s*", `"tl_name`"), "vif", \
+ ``tl_name``_tl_if);
+
+`define DRIVE_TL_DEVICE_IF(tl_name, inst_name, sig_name) \
+ force ``tl_name``_tl_if.h2d = dut.top_earlgrey.u_``inst_name``.``sig_name``_i; \
+ force dut.top_earlgrey.u_``inst_name``.``sig_name``_o = ``tl_name``_tl_if.d2h; \
+ uvm_config_db#(virtual tl_if)::set(null, $sformatf("*%0s*", `"tl_name`"), "vif", \
+ ``tl_name``_tl_if);
+</%text>\
+
% for c in clk_freq.keys():
wire clk_${c};
clk_rst_if clk_rst_if_${c}(.clk(clk_${c}), .rst_n(rst_n));
@@ -70,12 +85,24 @@
% endfor
% endfor
-% for name, clk in hosts.items():
- `DRIVE_TL_HOST_IF(${name}, dut.top_${top["name"]}, ${clk}, rst_n, h_h2d, h_d2h)
-% endfor
+% for xbar in top["xbar"]:
+ % for node in xbar["nodes"]:
+<%
+clk = 'clk_' + clk_src[node["clock"]]
+inst_sig_list = lib.find_otherside_modules(top, xbar["name"], 'tl_' + node["name"])
+inst_name = inst_sig_list[0][1]
+sig_name = inst_sig_list[0][2]
-% for name, clk in devices.items():
- `DRIVE_TL_DEVICE_IF(${name}, dut.top_${top["name"]}, ${clk}, rst_n, d_d2h, d_h2d)
+%>\
+ % if node["type"] == "host" and not node["xbar"]:
+ `DRIVE_TL_HOST_IF(${node["name"]}, ${inst_name}, ${sig_name})
+ % elif node["type"] == "device" and not node["xbar"]:
+ `DRIVE_TL_DEVICE_IF(${node["name"]}, ${inst_name}, ${sig_name})
+ % endif
+ % endfor
% endfor
end
end
+
+`undef DRIVE_TL_HOST_IF
+`undef DRIVE_TL_DEVICE_IF
diff --git a/hw/top_earlgrey/dv/autogen/tb__xbar_connect.sv b/hw/top_earlgrey/dv/autogen/tb__xbar_connect.sv
index f25eb55..2cbcfef 100644
--- a/hw/top_earlgrey/dv/autogen/tb__xbar_connect.sv
+++ b/hw/top_earlgrey/dv/autogen/tb__xbar_connect.sv
@@ -3,6 +3,19 @@
// SPDX-License-Identifier: Apache-2.0
//
// tb__xbar_connect generated by `topgen.py` tool
+
+`define DRIVE_TL_HOST_IF(tl_name, inst_name, sig_name) \
+ force ``tl_name``_tl_if.d2h = dut.top_earlgrey.u_``inst_name``.``sig_name``_i; \
+ force dut.top_earlgrey.u_``inst_name``.``sig_name``_o = ``tl_name``_tl_if.h2d; \
+ uvm_config_db#(virtual tl_if)::set(null, $sformatf("*%0s*", `"tl_name`"), "vif", \
+ ``tl_name``_tl_if);
+
+`define DRIVE_TL_DEVICE_IF(tl_name, inst_name, sig_name) \
+ force ``tl_name``_tl_if.h2d = dut.top_earlgrey.u_``inst_name``.``sig_name``_i; \
+ force dut.top_earlgrey.u_``inst_name``.``sig_name``_o = ``tl_name``_tl_if.d2h; \
+ uvm_config_db#(virtual tl_if)::set(null, $sformatf("*%0s*", `"tl_name`"), "vif", \
+ ``tl_name``_tl_if);
+
wire clk_main;
clk_rst_if clk_rst_if_main(.clk(clk_main), .rst_n(rst_n));
wire clk_io;
@@ -60,32 +73,34 @@
force tb.dut.top_earlgrey.u_xbar_main.rst_fixed_ni = rst_n;
force tb.dut.top_earlgrey.u_xbar_peri.rst_peri_ni = rst_n;
- `DRIVE_TL_HOST_IF(corei, dut.top_earlgrey, clk_main, rst_n, h_h2d, h_d2h)
- `DRIVE_TL_HOST_IF(cored, dut.top_earlgrey, clk_main, rst_n, h_h2d, h_d2h)
- `DRIVE_TL_HOST_IF(dm_sba, dut.top_earlgrey, clk_main, rst_n, h_h2d, h_d2h)
-
- `DRIVE_TL_DEVICE_IF(rom, dut.top_earlgrey, clk_main, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(debug_mem, dut.top_earlgrey, clk_main, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(ram_main, dut.top_earlgrey, clk_main, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(eflash, dut.top_earlgrey, clk_main, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(flash_ctrl, dut.top_earlgrey, clk_main, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(hmac, dut.top_earlgrey, clk_main, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(aes, dut.top_earlgrey, clk_main, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(rv_plic, dut.top_earlgrey, clk_main, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(pinmux, dut.top_earlgrey, clk_main, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(padctrl, dut.top_earlgrey, clk_main, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(alert_handler, dut.top_earlgrey, clk_main, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(nmi_gen, dut.top_earlgrey, clk_main, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(otbn, dut.top_earlgrey, clk_main, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(uart, dut.top_earlgrey, clk_io, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(gpio, dut.top_earlgrey, clk_io, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(spi_device, dut.top_earlgrey, clk_io, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(rv_timer, dut.top_earlgrey, clk_io, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(usbdev, dut.top_earlgrey, clk_io, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(pwrmgr, dut.top_earlgrey, clk_io, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(rstmgr, dut.top_earlgrey, clk_io, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(clkmgr, dut.top_earlgrey, clk_io, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(ram_ret, dut.top_earlgrey, clk_io, rst_n, d_d2h, d_h2d)
- `DRIVE_TL_DEVICE_IF(sensor_ctrl, dut.top_earlgrey, clk_io, rst_n, d_d2h, d_h2d)
+ `DRIVE_TL_HOST_IF(corei, rv_core_ibex, tl_i)
+ `DRIVE_TL_HOST_IF(cored, rv_core_ibex, tl_d)
+ `DRIVE_TL_HOST_IF(dm_sba, dm_top, tl_h)
+ `DRIVE_TL_DEVICE_IF(rom, tl_adapter_rom, tl)
+ `DRIVE_TL_DEVICE_IF(debug_mem, dm_top, tl_d)
+ `DRIVE_TL_DEVICE_IF(ram_main, tl_adapter_ram_main, tl)
+ `DRIVE_TL_DEVICE_IF(eflash, tl_adapter_eflash, tl)
+ `DRIVE_TL_DEVICE_IF(flash_ctrl, flash_ctrl, tl)
+ `DRIVE_TL_DEVICE_IF(hmac, hmac, tl)
+ `DRIVE_TL_DEVICE_IF(aes, aes, tl)
+ `DRIVE_TL_DEVICE_IF(rv_plic, rv_plic, tl)
+ `DRIVE_TL_DEVICE_IF(pinmux, pinmux, tl)
+ `DRIVE_TL_DEVICE_IF(padctrl, padctrl, tl)
+ `DRIVE_TL_DEVICE_IF(alert_handler, alert_handler, tl)
+ `DRIVE_TL_DEVICE_IF(nmi_gen, nmi_gen, tl)
+ `DRIVE_TL_DEVICE_IF(otbn, otbn, tl)
+ `DRIVE_TL_DEVICE_IF(uart, uart, tl)
+ `DRIVE_TL_DEVICE_IF(gpio, gpio, tl)
+ `DRIVE_TL_DEVICE_IF(spi_device, spi_device, tl)
+ `DRIVE_TL_DEVICE_IF(rv_timer, rv_timer, tl)
+ `DRIVE_TL_DEVICE_IF(usbdev, usbdev, tl)
+ `DRIVE_TL_DEVICE_IF(pwrmgr, pwrmgr, tl)
+ `DRIVE_TL_DEVICE_IF(rstmgr, rstmgr, tl)
+ `DRIVE_TL_DEVICE_IF(clkmgr, clkmgr, tl)
+ `DRIVE_TL_DEVICE_IF(ram_ret, tl_adapter_ram_ret, tl)
+ `DRIVE_TL_DEVICE_IF(sensor_ctrl, sensor_ctrl, tl)
end
end
+
+`undef DRIVE_TL_HOST_IF
+`undef DRIVE_TL_DEVICE_IF
diff --git a/hw/top_earlgrey/dv/chip_sim_cfg.hjson b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
index 3a79cc6..145c96b 100644
--- a/hw/top_earlgrey/dv/chip_sim_cfg.hjson
+++ b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
@@ -36,7 +36,7 @@
"{proj_root}/hw/dv/data/tests/mem_tests.hjson",
"{proj_root}/hw/dv/data/tests/tl_access_tests.hjson",
// xbar tests
- //"{proj_root}/hw/ip/tlul/generic_dv/xbar_tests.hjson"
+ "{proj_root}/hw/ip/tlul/generic_dv/xbar_tests.hjson"
]
// Override the default vcs_cov_hier flag to supply chip specific coverage hierarchies.
diff --git a/hw/top_earlgrey/dv/tb/tb.sv b/hw/top_earlgrey/dv/tb/tb.sv
index 8f9fede..9174b57 100644
--- a/hw/top_earlgrey/dv/tb/tb.sv
+++ b/hw/top_earlgrey/dv/tb/tb.sv
@@ -232,6 +232,6 @@
end
assign cpu_d_tl_if.d2h = `CPU_HIER.tl_d_i;
- //`include "../autogen/tb__xbar_connect.sv"
+ `include "../autogen/tb__xbar_connect.sv"
endmodule
diff --git a/util/topgen/intermodule.py b/util/topgen/intermodule.py
index 1a7cb4f..cb4116f 100644
--- a/util/topgen/intermodule.py
+++ b/util/topgen/intermodule.py
@@ -6,7 +6,7 @@
import re
from collections import OrderedDict
from enum import Enum
-from typing import Dict, Tuple, List
+from typing import Dict, List, Tuple
from reggen.validate import check_int
from topgen import lib
@@ -525,6 +525,22 @@
s) -> List[Tuple[str, str, str]]:
"""Find far-end port based on given module and signal name
"""
+ # TODO: handle special cases
+ special_inst_names = {
+ ('main', 'tl_rom'): ('tl_adapter_rom', 'tl'),
+ ('main', 'tl_ram_main'): ('tl_adapter_ram_main', 'tl'),
+ ('main', 'tl_eflash'): ('tl_adapter_eflash', 'tl'),
+ ('peri', 'tl_ram_ret'): ('tl_adapter_ram_ret', 'tl'),
+ ('main', 'tl_corei'): ('rv_core_ibex', 'tl_i'),
+ ('main', 'tl_cored'): ('rv_core_ibex', 'tl_d'),
+ ('main', 'tl_dm_sba'): ('dm_top', 'tl_h'),
+ ('main', 'tl_debug_mem'): ('dm_top', 'tl_d')
+ }
+ for pair in special_inst_names:
+ if pair == (m, s):
+ result = special_inst_names.get(pair)
+ return [('top', result[0], result[1])]
+
signame = "{}.{}".format(m, s)
for req, rsps in topcfg["inter_module"]["connect"].items():
if req.startswith(signame):
@@ -540,24 +556,6 @@
req_m, req_s, req_i = filter_index(req)
return [('connect', req_m, req_s)]
- # If reaches here, no matching results in 'connect'
- # so search 'top' or 'external'
-
- # todo: something here
- # check special cases
- pairs = {
- ('main', 'tl_corei'): ('rv_core_ibex', 'tl_i'),
- ('main', 'tl_cored'): ('rv_core_ibex', 'tl_d'),
- ('main', 'tl_dm_sba'): ('dm_top', 'tl_h'),
- ('main', 'tl_debug_mem'): ('dm_top', 'tl_d')
- }
- for sig in topcfg["inter_signal"]["signals"]:
- pairs[(sig['inst_name'], sig['name'])] = ('', sig['top_signame'])
-
- pair = pairs.get((m, s))
- if pair is not None:
- return [('top', pair[0], pair[1])]
-
# if reaches here, it means either the format is wrong, or floating port.
log.error("`find_otherside_modules()`: "
"No such signal {}.{} exists.".format(m, s))
diff --git a/util/topgen/lib.py b/util/topgen/lib.py
index ea3fdf5..c887595 100644
--- a/util/topgen/lib.py
+++ b/util/topgen/lib.py
@@ -3,16 +3,18 @@
# SPDX-License-Identifier: Apache-2.0
import logging as log
+import re
+import sys
+from collections import OrderedDict
from copy import deepcopy
from pathlib import Path
-from collections import OrderedDict
-import hjson
-import sys
-import re
+import hjson
# Ignore flake8 warning as the function is used in the template
-from .intermodule import im_defname, im_netname, im_portname # noqa : F401
+# disable isort formating, as conflicting with flake8
+from .intermodule import find_otherside_modules # noqa : F401 # isort:skip
+from .intermodule import im_portname, im_defname, im_netname # noqa : F401 # isort:skip
def is_ipcfg(ip: Path) -> bool: # return bool
