[test] Add rom peripheral and data init tests to rom test plan
Signed-off-by: Alphan Ulusoy <alphan@google.com>
diff --git a/sw/device/silicon_creator/rom/data/rom_testplan.hjson b/sw/device/silicon_creator/rom/data/rom_testplan.hjson
index 51e2df1..50b4e99 100644
--- a/sw/device/silicon_creator/rom/data/rom_testplan.hjson
+++ b/sw/device/silicon_creator/rom/data/rom_testplan.hjson
@@ -967,6 +967,162 @@
milestone: V2
tests: []
}
-
-]
+
+ {
+ name: rom_e2e_ret_ram_init
+ desc: '''Verify that ROM initializes the retention SRAM when needed.
+
+ `CREATOR_SW_CFG_RET_RAM_RESET_MASK` should be `1 << 3` so that ROM initializes the
+ retention SRAM after a SW reset request.
+
+ - Verify that `reset_reasons` reports POR.
+ - Write a known pattern into all sections of retention SRAM.
+ - Request a SW reset.
+ - Verify that `reset_reasons` reports a SW request.
+ - Verify that all previously written sections are different.
+ '''
+ tags: ["rom", "verilator", "dv", "fpga", "silicon"]
+ milestone: V2
+ tests: []
+
+ }
+
+ {
+ name: rom_e2e_ret_ram_keep
+ desc: '''Verify that the retention SRAM is preserved across resets.
+
+ - Verify that `reset_reasons` reports POR.
+ - Write a known pattern into all sections of retention SRAM.
+ - Perform a low power entry & exit.
+ - Verify that `reset_reasons` reports a low power exit.
+ - Verify that all previously written sections are intact.
+ - Request a SW reset.
+ - Verify that `reset_reasons` reports a SW request.
+ - Verify that all previously written sections are intact.
+ '''
+ tags: ["rom", "verilator", "dv", "fpga", "silicon"]
+ milestone: V2
+ tests: []
+ }
+
+ {
+ name: rom_e2e_pinmux_init
+ desc: '''Verify that ROM initializes various peripherals properly.
+
+ - Pinmux: UART pins, SW straps if `OWNER_SW_CFG_ROM_BOOTSTRAP_EN == kHardenedBoolTrue`
+ - UART
+ - Bits 0-5 of the `cpuctrl` CSR: `CREATOR_SW_CFG_CPUCTRL`
+ '''
+ tags: ["rom", "verilator", "dv", "fpga", "silicon"]
+ milestone: V2
+ tests: []
+ }
+
+ {
+ name: rom_e2e_epmp_init
+ desc: '''Verify that ROM correctly configures the ePMP region for debug ROM.
+
+ - ePMP Debug ROM region should be enabled in TEST, DEV, and RMA, anddisabled in PROD and
+ PROD_END.
+ '''
+ tags: ["rom", "verilator", "dv", "fpga", "silicon"]
+ milestone: V2
+ tests: []
+ }
+
+ {
+ name: rom_e2e_watchdog_reconfig
+ desc: '''Verify that ROM reconfigures the watchdog timer correctly.
+
+ - Should be disabled in TEST and RMA.
+ - In DEV, PROD, and PROD_END, the threshold should be
+ `OWNER_SW_CFG_ROM_WATCHDOG_BITE_THRESHOLD_CYCLES` if greater than or equal to
+ `kWatchdogMinThreshold`, disabled otherwise.
+ '''
+ tags: ["rom", "verilator", "dv", "fpga", "silicon"]
+ milestone: V2
+ tests: []
+ }
+
+ {
+ name: rom_e2e_alert_config
+ desc: '''Verify that ROM configures the alert handler correctly.
+
+ - Disabled in TEST.
+ - Read from OTP in DEV, PROD, PROD_END, and RMA. Checksum of config registers must match
+ the OTP value.
+ '''
+ tags: ["rom", "verilator", "dv", "fpga", "silicon"]
+ milestone: V2
+ tests: []
+ }
+
+ {
+ name: rom_e2e_flash_ctrl_init
+ desc: '''Verify that ROM initializes the flash_ctrl correctly.
+
+ - Verify that
+ - `CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG` controls the default scrambling, ecc, and he
+ settings for the data partitions.
+ - `CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG` controls the scrambling, ecc, and he
+ settings for the boot partitions `kFlashCtrlInfoPageBootData0` and
+ `kFlashCtrlInfoPageBootData1`.
+ - Verify that `kFlashCtrlInfoPageCreatorSecret` is locked down.
+ - Verify that flash_ctrl is initialized.
+ '''
+ tags: ["rom", "verilator", "dv", "fpga", "silicon"]
+ milestone: V2
+ tests: []
+ }
+
+ {
+ name: rom_e2e_keymgr_init
+ desc: '''Verify that ROM initializes the keymgr correctly.
+
+ - Verify that keymgr is at the "reset" state.
+ - Verify that
+ - attestation sw binding equals
+ - the digest of the ROM_EXT if `OWNER_SW_CFG_ROM_KEYMGR_ROM_EXT_MEAS_EN` is
+ `kHardenedBoolTrue`, and
+ - the `binding_value` field of the manifest, otherwise,
+ - sealing sw binding equals the `binding_value` field of the manifest, and
+ - max creator key version equals the `max_key_version` field of the manifest,
+ '''
+ tags: ["rom", "verilator", "dv", "fpga", "silicon"]
+ milestone: V2
+ tests: []
+ }
+
+ {
+ name: rom_e2e_static_critical
+ desc: '''Verify that ROM initializes the data structures in the `.static_critical` section
+ properly.
+
+ - Verify that `boot_measurements` holds the digest of the next stage.
+ - Don't specify any usage constraints to be able to compute the actual hash in the second stage.
+ - Verify that `sec_mmio_ctx` is valid using `sec_mmio_check_values()` and
+ `sec_mmio_check_counters()`.
+ '''
+ tags: ["rom", "verilator", "dv", "fpga", "silicon"]
+ milestone: V2
+ tests: []
+ }
+
+ {
+ name: rom_functests
+ desc: '''Determine which functests can be executed using ROM.
+
+ Functests test ROM components (e.g., drivers, libraries, etc.) work as intended on-chip.
+ However, unlike when these components are embedded in the ROM, functests are linked with
+ the OTTF, and run out of flash. Additionally, unlike the ROM E2E tests, functests are
+ booted by the test ROM.
+
+ Determine which functests can be executed using ROM to understand which tests can be
+ reused on the silicon.
+ '''
+ tags: ["rom", "verilator", "dv", "fpga", "silicon"]
+ milestone: V2
+ tests: []
+ }
+ ]
}
